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Searched refs:GIR_ConstrainOperandRC (Results 1 – 6 of 6) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenGlobalISel.inc5545 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64all*/15,
5546 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GPR32*/6,
5575 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64all*/15,
5576 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GPR32*/6,
5605 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64all*/15,
5606 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GPR32*/6,
5635 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64all*/15,
5636 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GPR32*/6,
5665 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64all*/15,
5666 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/2, /*RC GPR32*/6,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenGlobalISel.inc2602 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
2636 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
2664 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3003 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR16*/6,
3004 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR32*/33,
3023 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/0, /*RC GR8*/0,
3024 GIR_ConstrainOperandRC, /*InsnID*/1, /*Op*/1, /*RC GR32*/33,
3495 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3568 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3691 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DInstructionSelector.h340 GIR_ConstrainOperandRC, enumerator
DInstructionSelectorImpl.h978 case GIR_ConstrainOperandRC: { in executeMatchTable()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenGlobalISel.inc3169 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/8,
3180 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/8,
3191 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FGR32*/6,
3202 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FGR32*/6,
3242 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC DSPR*/5,
3251 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC DSPR*/5,
3265 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC MSA128D*/65,
3275 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC MSA128D*/65,
3285 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC MSA128D*/65,
3295 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC MSA128D*/65,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenGlobalISel.inc5534 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
5616 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
5678 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7278 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7360 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7422 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7710 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7792 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
7854 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VCCR*/32,
8074 GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC DPR*/36,
[all …]