Searched refs:GroupSize (Results 1 – 8 of 8) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULowerKernelAttributes.cpp | 170 Value *GroupSize = WorkGroupSizes[I]; in processUse() local
172 if (!GroupSize || !GridSize) in processUse()
175 for (User *U : GroupSize->users()) { in processUse()
221 Value *GroupSize = WorkGroupSizes[I]; in processUse() local
222 if (!GroupSize) in processUse()
226 GroupSize->replaceAllUsesWith( in processUse()
228 GroupSize->getType(), in processUse()
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| D | SIMachineScheduler.cpp | 674 unsigned GroupSize; in colorHighLatenciesGroups() local
689 GroupSize = 2; in colorHighLatenciesGroups()
691 GroupSize = 3; in colorHighLatenciesGroups()
693 GroupSize = 4; in colorHighLatenciesGroups()
785 } else if (Count == GroupSize) { in colorHighLatenciesGroups()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InterleavedAccess.cpp | 453 int GroupSize = std::ceil((VF - FirstGroupElement) / 3.0); in setGroupSize() local
454 SizeInfo.push_back(GroupSize); in setGroupSize()
455 FirstGroupElement = ((GroupSize)*3 + FirstGroupElement) % VF; in setGroupSize()
554 SmallVector<uint32_t, 3> GroupSize; in deinterleave8bitStride3() local
560 setGroupSize(VT, GroupSize); in deinterleave8bitStride3()
563 DecodePALIGNRMask(VT, GroupSize[2 - i], VPAlign[i], false); in deinterleave8bitStride3()
565 DecodePALIGNRMask(VT, GroupSize[2] + GroupSize[1], VPAlign2, true, true); in deinterleave8bitStride3()
566 DecodePALIGNRMask(VT, GroupSize[1], VPAlign3, true, true); in deinterleave8bitStride3()
636 SmallVector<uint32_t, 3> GroupSize; in interleave8bitStride3() local
645 setGroupSize(VT, GroupSize); in interleave8bitStride3()
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| /third_party/node/deps/v8/src/objects/ |
| D | swiss-hash-table-helpers.h | 77 template <size_t GroupSize>
90 index_ += GroupSize; in next()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUInstPrinter.cpp | 1255 uint16_t GroupSize = BITMASK_MAX - AndMask + 1; in printSwizzle() local
1256 if (GroupSize > 1 && in printSwizzle()
1257 isPowerOf2_64(GroupSize) && in printSwizzle()
1258 OrMask < GroupSize && in printSwizzle()
1263 O << formatDec(GroupSize); in printSwizzle()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegAllocGreedy.cpp | 1261 const unsigned GroupSize = 8; in addThroughConstraints() local
1262 SpillPlacement::BlockConstraint BCS[GroupSize]; in addThroughConstraints()
1263 unsigned TBS[GroupSize]; in addThroughConstraints()
1271 assert(T < GroupSize && "Array overflow"); in addThroughConstraints()
1273 if (++T == GroupSize) { in addThroughConstraints()
1280 assert(B < GroupSize && "Array overflow"); in addThroughConstraints()
1301 if (++B == GroupSize) { in addThroughConstraints()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 5512 int64_t GroupSize; in parseSwizzleBroadcast() local
5515 if (!parseSwizzleOperands(1, &GroupSize, in parseSwizzleBroadcast()
5520 if (!isPowerOf2_64(GroupSize)) { in parseSwizzleBroadcast()
5525 0, GroupSize - 1, in parseSwizzleBroadcast()
5527 Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0); in parseSwizzleBroadcast()
5538 int64_t GroupSize; in parseSwizzleReverse() local
5540 if (!parseSwizzleOperands(1, &GroupSize, in parseSwizzleReverse()
5544 if (!isPowerOf2_64(GroupSize)) { in parseSwizzleReverse()
5549 Imm = encodeBitmaskPerm(BITMASK_MAX, 0, GroupSize - 1); in parseSwizzleReverse()
5558 int64_t GroupSize; in parseSwizzleSwap() local
[all …]
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| /third_party/protobuf/src/google/protobuf/ |
| D | wire_format_lite.h | 700 static inline size_t GroupSize(const MessageType& value);
1758 inline size_t WireFormatLite::GroupSize(const MessageType& value) { in GroupSize() function
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