| /third_party/ffmpeg/libavcodec/loongarch/ |
| D | vc1dsp_init_loongarch.c | 27 #define FN_ASSIGN(OP, X, Y, INSN) \ argument
28 dsp->OP##vc1_mspel_pixels_tab[1][X+4*Y] = ff_##OP##vc1_mspel_mc##X##Y##INSN; \
29 dsp->OP##vc1_mspel_pixels_tab[0][X+4*Y] = ff_##OP##vc1_mspel_mc##X##Y##_16##INSN
31 #define FN_ASSIGN_V(OP, Y, INSN) \ argument
32 dsp->OP##vc1_mspel_pixels_tab[0][4*Y] = ff_##OP##vc1_mspel_mc0##Y##_16##INSN
34 #define FN_ASSIGN_H(OP, X, INSN) \ argument
35 dsp->OP##vc1_mspel_pixels_tab[0][X] = ff_##OP##vc1_mspel_mc##X##0_16##INSN
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZPatterns.td | 9 // Record that INSN performs a 64-bit version of unary operator OPERATOR
18 // Record that INSN performs a 64-bit version of binary operator OPERATOR
38 // Record that INSN performs a binary read-modify-write operation,
48 // Record that INSN performs binary operation OPERATION on a byte
56 // Record that INSN performs insertion TYPE into a register of class CLS.
68 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
75 // INSN and INSNY are an RX/RXY pair of instructions that store the low
84 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
95 // INSN and INSNINV conditionally store the low 32 bits of a GPR to memory,
96 // with INSN storing when the condition is true and INSNINV storing when the
[all …]
|
| D | SystemZInstrFormats.td | 34 // Many register-based <INSN>R instructions have a memory-based <INSN>
35 // counterpart. OpKey uniquely identifies <INSN>R, while OpType is
36 // "reg" for <INSN>R and "mem" for <INSN>.
4764 // Mapping: <INSN>R -> MemFoldPseudo -> <INSN>
|
| /third_party/ffmpeg/libavcodec/tests/x86/ |
| D | dct.c | 33 #define PR_WRAP(INSN) \ argument
34 static void ff_prores_idct_put_10_##INSN##_wrap(int16_t *dst){ \
43 ff_prores_idct_put_10_##INSN (dst, 16, tmp, qmat); \
|
| /third_party/ffmpeg/libavcodec/mips/ |
| D | vc1dsp_init_mips.c | 27 #define FN_ASSIGN(OP, X, Y, INSN) \ argument
28 dsp->OP##vc1_mspel_pixels_tab[1][X+4*Y] = ff_##OP##vc1_mspel_mc##X##Y##INSN; \
29 dsp->OP##vc1_mspel_pixels_tab[0][X+4*Y] = ff_##OP##vc1_mspel_mc##X##Y##_16##INSN
|
| /third_party/ffmpeg/libavcodec/x86/ |
| D | vc1dsp_init.c | 69 #define DECLARE_FUNCTION(OP, DEPTH, INSN) \ argument
70 static void OP##vc1_mspel_mc00_##DEPTH##INSN(uint8_t *dst, \
73 ff_ ## OP ## pixels ## DEPTH ## INSN(dst, src, stride, DEPTH); \
|
| D | vc1dsp_mmx.c | 439 #define FN_ASSIGN(OP, X, Y, INSN) \ argument
440 dsp->OP##vc1_mspel_pixels_tab[1][X+4*Y] = OP##vc1_mspel_mc##X##Y##INSN; \
441 dsp->OP##vc1_mspel_pixels_tab[0][X+4*Y] = OP##vc1_mspel_mc##X##Y##_16##INSN
|
| /third_party/vixl/test/aarch64/ |
| D | test-disasm-sve-aarch64.cc | 3727 #define VIXL_DISAM_PREFETCH_TEST(INSN, NAME, SH) \ in TEST() argument
3734 COMPARE_PREFIX(INSN(op, p6, SVEMemOperand(z30.VnS(), 31)), str.c_str()); \ in TEST()
3735 COMPARE_PREFIX(INSN(op, p5, SVEMemOperand(z29.VnD(), 17)), str.c_str()); \ in TEST()
3737 COMPARE_PREFIX(INSN(op, p4, SVEMemOperand(x11, -32, SVE_MUL_VL)), \ in TEST()
3739 COMPARE_PREFIX(INSN(op, p4, SVEMemOperand(sp, 31, SVE_MUL_VL)), \ in TEST()
3742 COMPARE_PREFIX(INSN(op, p3, SVEMemOperand(x24, z22.VnS(), UXTW, SH)), \ in TEST()
3744 COMPARE_PREFIX(INSN(op, p2, SVEMemOperand(x24, z22.VnD(), SXTW, SH)), \ in TEST()
3746 COMPARE_PREFIX(INSN(op, p1, SVEMemOperand(x4, z2.VnD(), LSL, SH)), \ in TEST()
3749 COMPARE_PREFIX(INSN(op, p1, SVEMemOperand(x8, x29, LSL, SH)), \ in TEST()
3751 COMPARE_PREFIX(INSN(op, p0, SVEMemOperand(sp, x6, LSL, SH)), \ in TEST()
|