Searched refs:INTEL_L3P_RO (Results 1 – 5 of 5) sorted by relevance
272 w.w[INTEL_L3P_RO] = devinfo->platform == INTEL_PLATFORM_BYT ? 0.5 : 1.0; in intel_get_default_l3_weights()384 cfg->n[INTEL_L3P_DC], cfg->n[INTEL_L3P_RO], in intel_dump_l3_config()
44 INTEL_L3P_RO, enumerator
630 l3cr.ROAllocation = cfg->n[INTEL_L3P_RO]; in genX()639 const bool has_is = cfg->n[INTEL_L3P_IS] || cfg->n[INTEL_L3P_RO] || in genX()641 const bool has_c = cfg->n[INTEL_L3P_C] || cfg->n[INTEL_L3P_RO] || in genX()643 const bool has_t = cfg->n[INTEL_L3P_T] || cfg->n[INTEL_L3P_RO] || in genX()681 l3cr2.ROAllocation = cfg->n[INTEL_L3P_RO]; in genX()
1069 const bool has_is = cfg->n[INTEL_L3P_IS] || cfg->n[INTEL_L3P_RO] || in setup_l3_config()1071 const bool has_c = cfg->n[INTEL_L3P_C] || cfg->n[INTEL_L3P_RO] || in setup_l3_config()1073 const bool has_t = cfg->n[INTEL_L3P_T] || cfg->n[INTEL_L3P_RO] || in setup_l3_config()1118 reg.ROAllocation = cfg->n[INTEL_L3P_RO]; in setup_l3_config()1160 reg.ROAllocation = cfg->n[INTEL_L3P_RO]; in setup_l3_config()
775 reg.ROAllocation = cfg->n[INTEL_L3P_RO]; in iris_emit_l3_config()