Searched refs:ISHST (Results 1 – 11 of 11) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 69 ISHST = 10, enumerator
85 case ISHST: return "ishst"; in MemBOptToString()
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| /third_party/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 521 case ISHST: in GetName()
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| D | instructions-aarch32.h | 1248 ISHST = 0xa, enumerator
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | constants-arm.h | 207 ISHST = 0xa, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARM.td | 228 // Swift has ISHST barriers compatible with Atomic Release semantics but weaker
231 "true", "Prefer ISHST barriers">;
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| D | ARMISelLowering.cpp | 3817 Domain = ARM_MB::ISHST; in LowerATOMIC_FENCE()
16738 return makeDMB(Builder, ARM_MB::ISHST); in emitLeadingFence()
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| /third_party/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 3796 COMPARE_BOTH(Dmb(ISHST), "dmb ishst\n"); in TEST()
3806 COMPARE_BOTH(Dsb(ISHST), "dsb ishst\n"); in TEST()
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| D | test-assembler-aarch32.cc | 4406 __ Dmb(ISHST); in TEST()
4416 __ Dsb(ISHST); in TEST()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 1261 { "ISHST", 7 },
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4766 .Case("shst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
4767 .Case("ishst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSubtargetInfo.inc | 316 …{ "prefer-ishst", "Prefer ISHST barriers", ARM::FeaturePrefISHSTBarrier, { { { 0x0ULL, 0x0ULL, 0x0…
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