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Searched refs:ImmOp (Results 1 – 25 of 35) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp107 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
109 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
111 const MachineOperand &ImmOp, unsigned ImmOpNum);
413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
502 MIB.add(ImmOp); in changeLoad()
511 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
512 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
514 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
[all …]
DHexagonConstExtenders.cpp1761 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1762 assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi && in replaceInstrExpr()
1878 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
1879 ImmOp.setImm(ImmOp.getImm() + Diff); in replaceInstr()
DHexagonAsmPrinter.cpp255 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
256 const auto *HE = static_cast<const HexagonMCExpr*>(ImmOp.getExpr()); in ScaleVectorOffset()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp244 MachineOperand &ImmOp = LoADDI.getOperand(2); in detectAndFoldOffset() local
245 ImmOp.setOffset(Offset); in detectAndFoldOffset()
246 Tail.addOperand(ImmOp); in detectAndFoldOffset()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFMISimplifyPatchable.cpp120 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
121 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp291 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
292 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
297 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
298 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
DX86MCInstLower.cpp293 unsigned ImmOp = Inst.getNumOperands() - 1; in SimplifyShortImmForm() local
295 (Inst.getOperand(ImmOp).isImm() || Inst.getOperand(ImmOp).isExpr()) && in SimplifyShortImmForm()
307 MCOperand Saved = Inst.getOperand(ImmOp); in SimplifyShortImmForm()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp394 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
401 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
418 ImmOp.ChangeToImmediate(0); in rewriteFrameIndex()
422 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
DThumb2InstrInfo.cpp654 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
681 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
699 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp882 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
883 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp, TII); in foldOperand()
990 MachineOperand *ImmOp) { in tryConstantFoldOp() argument
994 MI->getOperand(1).ChangeToImmediate(~ImmOp->getImm()); in tryConstantFoldOp()
1389 const MachineOperand *ImmOp = nullptr; in isOMod() local
1393 ImmOp = Src0; in isOMod()
1396 ImmOp = Src1; in isOMod()
1401 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
DSIFixSGPRCopies.cpp334 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
336 if (!ImmOp->isImm()) in isSafeToFoldImmIntoCopy()
353 Imm = ImmOp->getImm(); in isSafeToFoldImmIntoCopy()
DAMDGPUInstructionSelector.cpp1420 MachineOperand &ImmOp = I.getOperand(1); in selectG_CONSTANT() local
1423 if (ImmOp.isFPImm()) { in selectG_CONSTANT()
1424 const APInt &Imm = ImmOp.getFPImm()->getValueAPF().bitcastToAPInt(); in selectG_CONSTANT()
1425 ImmOp.ChangeToImmediate(Imm.getZExtValue()); in selectG_CONSTANT()
1426 } else if (ImmOp.isCImm()) { in selectG_CONSTANT()
1427 ImmOp.ChangeToImmediate(ImmOp.getCImm()->getZExtValue()); in selectG_CONSTANT()
DSIInstrInfo.cpp2334 const MachineOperand *ImmOp = getNamedOperand(DefMI, AMDGPU::OpName::src0); in FoldImmediate() local
2335 assert(ImmOp); in FoldImmediate()
2337 if (!ImmOp->isImm()) in FoldImmediate()
2345 if (!isInlineConstant(*ImmOp, AMDGPU::OPERAND_REG_INLINE_AC_INT32)) in FoldImmediate()
2350 UseMI.getOperand(1).ChangeToImmediate(ImmOp->getImm()); in FoldImmediate()
2370 if (isInlineConstant(UseMI, *Src0, *ImmOp)) in FoldImmediate()
2397 const int64_t Imm = ImmOp->getImm(); in FoldImmediate()
2480 const int64_t Imm = ImmOp->getImm(); in FoldImmediate()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp241 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
242 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
284 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/AsmParser/
DBPFAsmParser.cpp91 struct ImmOp { struct
99 ImmOp Imm;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86Operand.h54 struct ImmOp { struct
76 struct ImmOp Imm;
DX86AsmParser.cpp2681 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, in ParseInstruction() local
2683 Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); in ParseInstruction()
2722 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, in ParseInstruction() local
2724 Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc)); in ParseInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td1167 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1171 dag InOperandList = (ins ROWS:$ws, ImmOp:$m);
1195 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1198 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1201 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1204 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1218 ValueType VecTy, Operand ImmOp, ImmLeaf Imm,
1222 dag InOperandList = (ins ROWS:$ws, ImmOp:$n);
1230 Operand ImmOp, ImmLeaf Imm,
1233 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
[all …]
DMipsDSPInstrInfo.td334 Operand ImmOp, ImmLeaf immPat, InstrItinClass itin,
337 dag InOperandList = (ins ImmOp:$imm);
389 Operand ImmOp, SDPatternOperator Imm,
392 dag InOperandList = (ins GPR32Opnd:$rs, ImmOp:$sa, GPR32Opnd:$src);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp124 struct ImmOp { struct
138 struct ImmOp Imm;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp1659 MachineOperand &ImmOp = I.getOperand(1); in select() local
1661 ImmOp.ChangeToImmediate( in select()
1662 ImmOp.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue()); in select()
3431 MachineOperand &ImmOp = I.getOperand(1); in emitFMovForFConstant() local
3439 if (ImmOp.getFPImm()->isNullValue()) in emitFMovForFConstant()
3443 const APFloat &ImmValAPF = ImmOp.getFPImm()->getValueAPF(); in emitFMovForFConstant()
3453 ImmOp.ChangeToImmediate(Imm); in emitFMovForFConstant()
/third_party/node/deps/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc2101 #define SIMD_FCM_L_CASE(Op, ImmOp, RegOp) \ in AssembleArchInstruction() argument
2105 __ Fcm##ImmOp(i.OutputSimd128Register().Format(f), \ in AssembleArchInstruction()
2114 #define SIMD_FCM_G_CASE(Op, ImmOp) \ in AssembleArchInstruction() argument
2119 __ Fcm##ImmOp(i.OutputSimd128Register().Format(f), \ in AssembleArchInstruction()
2123 #define SIMD_CM_L_CASE(Op, ImmOp) \ in AssembleArchInstruction() argument
2127 __ Cm##ImmOp(i.OutputSimd128Register().Format(f), \ in AssembleArchInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp235 struct ImmOp { struct in __anon4c4d37890211::SparcOperand
248 struct ImmOp Imm;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/
DRISCVAsmParser.cpp230 struct ImmOp { struct
246 ImmOp Imm;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp848 struct ImmOp { struct in __anon17d035690211::MipsOperand
864 struct ImmOp Imm;
2836 const MCOperand &ImmOp = Inst.getOperand(1); in expandLoadImm() local
2837 assert(ImmOp.isImm() && "expected immediate operand kind"); in expandLoadImm()
2841 if (loadImmediate(ImmOp.getImm(), DstRegOp.getReg(), Mips::NoRegister, in expandLoadImm()
3589 const MCOperand &ImmOp = Inst.getOperand(1); in expandBranchImm() local
3590 assert(ImmOp.isImm() && "expected immediate operand kind"); in expandBranchImm()
3619 int64_t ImmValue = ImmOp.getImm(); in expandBranchImm()

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