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Searched refs:InstrItins (Results 1 – 23 of 23) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DDFAPacketizer.h51 const InstrItineraryData *InstrItins;
58 DFAPacketizer(const InstrItineraryData *InstrItins, Automaton<uint64_t> a, in DFAPacketizer() argument
60 : InstrItins(InstrItins), A(std::move(a)), ItinActions(ItinActions) { in DFAPacketizer()
102 const InstrItineraryData *getInstrItins() const { return InstrItins; } in getInstrItins()
DTargetSchedule.h35 InstrItineraryData InstrItins; variable
85 return &InstrItins; in getInstrItineraries()
DResourcePriorityQueue.h62 const InstrItineraryData* InstrItins; variable
DMachinePipeliner.h65 const InstrItineraryData *InstrItins; variable
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp44 return EnableSchedItins && !InstrItins.isEmpty(); in hasInstrItineraries()
67 STI->initInstrItins(InstrItins); in init()
110 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()
111 return (UOps >= 0) ? UOps : TII->getNumMicroOps(&InstrItins, *MI); in getNumMicroOps()
194 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx, in computeOperandLatency()
199 OperLatency = InstrItins.getOperandCycle(DefClass, DefOperIdx); in computeOperandLatency()
205 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI); in computeOperandLatency()
279 return TII->getInstrLatency(&InstrItins, *MI); in computeInstrLatency()
DMachinePipeliner.cpp906 const InstrItineraryData *InstrItins; member
911 : InstrItins(TSI.getInstrItineraryData()), STI(&TSI) {} in FuncUnitSorter()
919 if (InstrItins && !InstrItins->isEmpty()) { in minFuncUnits()
921 make_range(InstrItins->beginStage(SchedClass), in minFuncUnits()
922 InstrItins->endStage(SchedClass))) { in minFuncUnits()
965 if (InstrItins && !InstrItins->isEmpty()) { in calcCriticalResources()
967 make_range(InstrItins->beginStage(SchedClass), in calcCriticalResources()
968 InstrItins->endStage(SchedClass))) { in calcCriticalResources()
DPostRASchedulerList.cpp213 const InstrItineraryData *InstrItins = in SchedulePostRATDList() local
217 InstrItins, this); in SchedulePostRATDList()
DTwoAddressInstructionPass.cpp96 const InstrItineraryData *InstrItins; member in __anon6c6b73e40111::TwoAddressInstructionPass
903 if (TII->getInstrLatency(InstrItins, *MI) > 1) in rescheduleMIBelowKill()
1036 if (TII->getInstrLatency(InstrItins, DefMI) > (Dist - DefDist)) in isDefTooClose()
1672 InstrItins = MF->getSubtarget().getInstrItineraryData(); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUSubtarget.h289 InstrItineraryData InstrItins; variable
447 return &InstrItins; in getInstrItineraryData()
1233 InstrItineraryData InstrItins; variable
1255 return &InstrItins; in getInstrItineraryData()
DAMDGPUSubtarget.cpp194 InstrItins(getInstrItineraryForCPU(GPU)), in GCNSubtarget()
546 InstrItins(getInstrItineraryForCPU(GPU)) { } in R600Subtarget()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSubtarget.cpp85 InstrItins(getInstrItineraryForCPU(CPUString)) { in HexagonSubtarget()
88 assert(InstrItins.Itineraries != nullptr && "InstrItins not initialized"); in HexagonSubtarget()
357 int DLatency = (InstrInfo.getOperandLatency(&InstrItins, *SrcInst, in adjustSchedDependency()
436 int Latency = (InstrInfo.getOperandLatency(&InstrItins, *SrcI, in restoreLatency()
DHexagonSubtarget.h92 InstrItineraryData InstrItins; variable
101 return &InstrItins; in getInstrItineraryData()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSubtarget.h205 InstrItineraryData InstrItins; variable
389 return &InstrItins; in getInstrItineraryData()
DMipsSubtarget.cpp245 InstrItins = getInstrItineraryForCPU(CPUName); in initializeSubtargetDependencies()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCSubtarget.h85 InstrItineraryData InstrItins; variable
183 return &InstrItins; in getInstrItineraryData()
DPPCSubtarget.cpp137 InstrItins = getInstrItineraryForCPU(CPUName); in initSubtargetFeatures()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGSDNodes.cpp50 InstrItins(mf.getSubtarget().getInstrItineraryData()) {} in ScheduleDAGSDNodes()
625 if (!InstrItins || InstrItins->isEmpty()) { in computeLatency()
639 SU->Latency += TII->getInstrLatency(InstrItins, N); in computeLatency()
655 int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx); in computeOperandLatency()
DScheduleDAGSDNodes.h50 const InstrItineraryData *InstrItins; variable
DResourcePriorityQueue.cpp44 : Picker(this), InstrItins(IS->MF->getSubtarget().getInstrItineraryData()) { in ResourcePriorityQueue()
313 if (Packet.size() >= InstrItins->SchedModel.IssueWidth) { in reserveResources()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCSubtargetInfo.cpp314 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { in initInstrItins()
315 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles, in initInstrItins()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMSubtarget.h493 InstrItineraryData InstrItins; variable
831 return &InstrItins; in getInstrItineraryData()
DARMSubtarget.cpp204 InstrItins = getInstrItineraryForCPU(CPUString); in initSubtargetFeatures()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCSubtargetInfo.h210 void initInstrItins(InstrItineraryData &InstrItins) const;