/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | Hexagon.td | 126 def getPredOpcode : InstrMapping { 142 def getFalsePredOpcode : InstrMapping { 154 def getTruePredOpcode : InstrMapping { 166 def getPredNewOpcode : InstrMapping { 178 def getPredOldOpcode : InstrMapping { 190 def getNewValueOpcode : InstrMapping { 202 def getNonNVStore : InstrMapping { 210 def changeAddrMode_abs_io: InstrMapping { 219 def changeAddrMode_io_abs: InstrMapping { 228 def changeAddrMode_io_rr: InstrMapping { [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | CSEInfo.cpp | 134 assert(InstrMapping.count(UMI->MI) == 0 && in insertNode() 136 InstrMapping[UMI->MI] = MaybeNewNode; in insertNode() 183 auto *UMI = InstrMapping.lookup(MI); in handleRecordedInst() 188 InstrMapping.erase(MI); in handleRecordedInst() 204 if (auto *UMI = InstrMapping.lookup(MI)) { in handleRemoveInst() 206 InstrMapping.erase(MI); in handleRemoveInst() 252 InstrMapping.clear(); in releaseMemory()
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D | RegBankSelect.cpp | 443 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in computeMapping() argument 448 if (!InstrMapping.isValid()) in computeMapping() 453 bool Saturated = Cost.addLocalCost(InstrMapping.getCost()); in computeMapping() 456 LLVM_DEBUG(dbgs() << "With: " << InstrMapping << '\n'); in computeMapping() 467 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping() 477 InstrMapping.getOperandMapping(OpIdx); in computeMapping() 582 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in applyMapping() argument 585 RegisterBankInfo::OperandsMapper OpdMapper(MI, InstrMapping, *MRI); in applyMapping() 597 InstrMapping.getOperandMapping(OpIdx); in applyMapping()
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D | RegisterBankInfo.cpp | 399 auto &InstrMapping = MapOfInstructionMappings[Hash]; in getInstructionMappingImpl() local 400 InstrMapping = std::make_unique<InstructionMapping>( in getInstructionMappingImpl() 402 return *InstrMapping; in getInstructionMappingImpl() 653 MachineInstr &MI, const InstructionMapping &InstrMapping, in OperandsMapper() argument 655 : MRI(MRI), MI(MI), InstrMapping(InstrMapping) { in OperandsMapper() 656 unsigned NumOpds = InstrMapping.getNumOperands(); in OperandsMapper() 658 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | RegisterBankInfo.h | 295 const InstructionMapping &InstrMapping; variable 322 OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping, 331 const InstructionMapping &getInstrMapping() const { return InstrMapping; } in getInstrMapping() 757 const RegisterBankInfo::InstructionMapping &InstrMapping) { 758 InstrMapping.print(OS);
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D | RegBankSelect.h | 593 const RegisterBankInfo::InstructionMapping &InstrMapping, 614 const RegisterBankInfo::InstructionMapping &InstrMapping,
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D | CSEInfo.h | 84 DenseMap<const MachineInstr *, UniqueMachineInstr *> InstrMapping; variable
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.td | 2380 def getVOPe64 : InstrMapping { 2389 def getVOPe32 : InstrMapping { 2398 def getSDWAOp : InstrMapping { 2407 def getBasicFromSDWAOp : InstrMapping { 2416 def getDPPOp32 : InstrMapping { 2425 def getCommuteOrig : InstrMapping { 2434 def getCommuteRev : InstrMapping { 2442 def getMCOpcodeGen : InstrMapping { 2462 def getSOPKOp : InstrMapping { 2470 def getAddr64Inst : InstrMapping { [all …]
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D | R600Instructions.td | 1796 def getLDSNoRetOp : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPC.td | 331 def getRecordFormOpcode : InstrMapping { 344 def getNonRecordFormOpcode : InstrMapping { 357 def getAltVSXFMAOpcode : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsDSPInstrFormats.td | 11 def Dsp2MicroMips : InstrMapping {
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D | MipsInstrFormats.td | 40 def Std2MicroMips : InstrMapping { 54 def Std2MicroMipsR6 : InstrMapping {
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D | Mips32r6InstrFormats.td | 15 def MipsR62MicroMipsR6 : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInfo.td | 199 def getStackOpcode : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | Target.td | 1552 // InstrMapping - This class is used to create mapping tables to relate 1556 class InstrMapping { 1558 // define the relationship modeled by this InstrMapping record.
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.td | 261 def splsIdempotent : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCInstrInfo.td | 918 def getPostIncOpcode : InstrMapping {
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZInstrFormats.td | 121 def getDisp12Opcode : InstrMapping { 130 def getDisp20Opcode : InstrMapping { 140 def getMemOpcode : InstrMapping { 149 def getTargetMemOpcode : InstrMapping { 158 def getTwoOperandOpcode : InstrMapping {
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