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Searched refs:InstrMapping (Results 1 – 18 of 18) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagon.td126 def getPredOpcode : InstrMapping {
142 def getFalsePredOpcode : InstrMapping {
154 def getTruePredOpcode : InstrMapping {
166 def getPredNewOpcode : InstrMapping {
178 def getPredOldOpcode : InstrMapping {
190 def getNewValueOpcode : InstrMapping {
202 def getNonNVStore : InstrMapping {
210 def changeAddrMode_abs_io: InstrMapping {
219 def changeAddrMode_io_abs: InstrMapping {
228 def changeAddrMode_io_rr: InstrMapping {
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCSEInfo.cpp134 assert(InstrMapping.count(UMI->MI) == 0 && in insertNode()
136 InstrMapping[UMI->MI] = MaybeNewNode; in insertNode()
183 auto *UMI = InstrMapping.lookup(MI); in handleRecordedInst()
188 InstrMapping.erase(MI); in handleRecordedInst()
204 if (auto *UMI = InstrMapping.lookup(MI)) { in handleRemoveInst()
206 InstrMapping.erase(MI); in handleRemoveInst()
252 InstrMapping.clear(); in releaseMemory()
DRegBankSelect.cpp443 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in computeMapping() argument
448 if (!InstrMapping.isValid()) in computeMapping()
453 bool Saturated = Cost.addLocalCost(InstrMapping.getCost()); in computeMapping()
456 LLVM_DEBUG(dbgs() << "With: " << InstrMapping << '\n'); in computeMapping()
467 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping()
477 InstrMapping.getOperandMapping(OpIdx); in computeMapping()
582 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in applyMapping() argument
585 RegisterBankInfo::OperandsMapper OpdMapper(MI, InstrMapping, *MRI); in applyMapping()
597 InstrMapping.getOperandMapping(OpIdx); in applyMapping()
DRegisterBankInfo.cpp399 auto &InstrMapping = MapOfInstructionMappings[Hash]; in getInstructionMappingImpl() local
400 InstrMapping = std::make_unique<InstructionMapping>( in getInstructionMappingImpl()
402 return *InstrMapping; in getInstructionMappingImpl()
653 MachineInstr &MI, const InstructionMapping &InstrMapping, in OperandsMapper() argument
655 : MRI(MRI), MI(MI), InstrMapping(InstrMapping) { in OperandsMapper()
656 unsigned NumOpds = InstrMapping.getNumOperands(); in OperandsMapper()
658 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DRegisterBankInfo.h295 const InstructionMapping &InstrMapping; variable
322 OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
331 const InstructionMapping &getInstrMapping() const { return InstrMapping; } in getInstrMapping()
757 const RegisterBankInfo::InstructionMapping &InstrMapping) {
758 InstrMapping.print(OS);
DRegBankSelect.h593 const RegisterBankInfo::InstructionMapping &InstrMapping,
614 const RegisterBankInfo::InstructionMapping &InstrMapping,
DCSEInfo.h84 DenseMap<const MachineInstr *, UniqueMachineInstr *> InstrMapping; variable
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.td2380 def getVOPe64 : InstrMapping {
2389 def getVOPe32 : InstrMapping {
2398 def getSDWAOp : InstrMapping {
2407 def getBasicFromSDWAOp : InstrMapping {
2416 def getDPPOp32 : InstrMapping {
2425 def getCommuteOrig : InstrMapping {
2434 def getCommuteRev : InstrMapping {
2442 def getMCOpcodeGen : InstrMapping {
2462 def getSOPKOp : InstrMapping {
2470 def getAddr64Inst : InstrMapping {
[all …]
DR600Instructions.td1796 def getLDSNoRetOp : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPC.td331 def getRecordFormOpcode : InstrMapping {
344 def getNonRecordFormOpcode : InstrMapping {
357 def getAltVSXFMAOpcode : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsDSPInstrFormats.td11 def Dsp2MicroMips : InstrMapping {
DMipsInstrFormats.td40 def Std2MicroMips : InstrMapping {
54 def Std2MicroMipsR6 : InstrMapping {
DMips32r6InstrFormats.td15 def MipsR62MicroMipsR6 : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td199 def getStackOpcode : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTarget.td1552 // InstrMapping - This class is used to create mapping tables to relate
1556 class InstrMapping {
1558 // define the relationship modeled by this InstrMapping record.
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td261 def splsIdempotent : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCInstrInfo.td918 def getPostIncOpcode : InstrMapping {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td121 def getDisp12Opcode : InstrMapping {
130 def getDisp20Opcode : InstrMapping {
140 def getMemOpcode : InstrMapping {
149 def getTargetMemOpcode : InstrMapping {
158 def getTwoOperandOpcode : InstrMapping {