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Searched refs:IntVT (Results 1 – 18 of 18) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.h346 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in getHalfSizedIntegerVT() local
347 IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) { in getHalfSizedIntegerVT()
348 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT()
DTargetLowering.h1908 virtual bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT, in shouldUseStrictFP_TO_INT() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DFunctionLoweringInfo.cpp427 EVT IntVT = ValueVTs[0]; in ComputePHILiveOutRegInfo() local
429 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1) in ComputePHILiveOutRegInfo()
431 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT); in ComputePHILiveOutRegInfo()
432 unsigned BitWidth = IntVT.getSizeInBits(); in ComputePHILiveOutRegInfo()
DFastISel.cpp425 EVT IntVT = TLI.getPointerTy(DL); in materializeConstant() local
426 uint32_t IntBitWidth = IntVT.getSizeInBits(); in materializeConstant()
434 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg, in materializeConstant()
1729 EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); in selectFNeg() local
1730 if (!TLI.isTypeLegal(IntVT)) in selectFNeg()
1733 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg()
1739 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg()
1740 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); in selectFNeg()
1744 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
DTargetLowering.cpp6048 EVT IntVT = SrcVT.changeTypeToInteger(); in expandFP_TO_SINT() local
6049 EVT IntShVT = getShiftAmountTy(IntVT, DAG.getDataLayout()); in expandFP_TO_SINT()
6051 SDValue ExponentMask = DAG.getConstant(0x7F800000, dl, IntVT); in expandFP_TO_SINT()
6052 SDValue ExponentLoBit = DAG.getConstant(23, dl, IntVT); in expandFP_TO_SINT()
6053 SDValue Bias = DAG.getConstant(127, dl, IntVT); in expandFP_TO_SINT()
6054 SDValue SignMask = DAG.getConstant(APInt::getSignMask(SrcEltBits), dl, IntVT); in expandFP_TO_SINT()
6055 SDValue SignLowBit = DAG.getConstant(SrcEltBits - 1, dl, IntVT); in expandFP_TO_SINT()
6056 SDValue MantissaMask = DAG.getConstant(0x007FFFFF, dl, IntVT); in expandFP_TO_SINT()
6058 SDValue Bits = DAG.getNode(ISD::BITCAST, dl, IntVT, Src); in expandFP_TO_SINT()
6061 ISD::SRL, dl, IntVT, DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask), in expandFP_TO_SINT()
[all …]
DLegalizeDAG.cpp1516 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFCOPYSIGN() local
1517 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFCOPYSIGN()
1518 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN()
1527 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1528 DAG.getConstant(0, DL, IntVT), ISD::SETNE); in ExpandFCOPYSIGN()
1542 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN()
1577 EVT IntVT = ValueAsInt.IntValue.getValueType(); in ExpandFABS() local
1578 SDValue ClearSignMask = DAG.getConstant(~ValueAsInt.SignMask, DL, IntVT); in ExpandFABS()
1579 SDValue ClearedSign = DAG.getNode(ISD::AND, DL, IntVT, ValueAsInt.IntValue, in ExpandFABS()
DLegalizeFloatTypes.cpp891 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in SoftenFloatOp_FP_TO_XINT() local
892 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; in SoftenFloatOp_FP_TO_XINT()
893 ++IntVT) { in SoftenFloatOp_FP_TO_XINT()
894 NVT = (MVT::SimpleValueType)IntVT; in SoftenFloatOp_FP_TO_XINT()
DDAGCombiner.cpp11427 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), SrcEltVT.getSizeInBits()); in ConstantFoldBITCASTofBUILD_VECTOR() local
11428 BV = ConstantFoldBITCASTofBUILD_VECTOR(BV, IntVT).getNode(); in ConstantFoldBITCASTofBUILD_VECTOR()
11429 SrcEltVT = IntVT; in ConstantFoldBITCASTofBUILD_VECTOR()
13400 EVT IntVT = Int.getValueType(); in visitFNEG() local
13401 if (IntVT.isInteger() && !IntVT.isVector()) { in visitFNEG()
13407 SignMask = APInt::getSplat(IntVT.getSizeInBits(), SignMask); in visitFNEG()
13410 SignMask = APInt::getSignMask(IntVT.getSizeInBits()); in visitFNEG()
13413 Int = DAG.getNode(ISD::XOR, DL0, IntVT, Int, in visitFNEG()
13414 DAG.getConstant(SignMask, DL0, IntVT)); in visitFNEG()
13497 EVT IntVT = Int.getValueType(); in visitFABS() local
[all …]
DSelectionDAG.cpp5737 EVT IntVT = VT.getScalarType(); in getMemsetValue() local
5738 if (!IntVT.isInteger()) in getMemsetValue()
5739 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits()); in getMemsetValue()
5741 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value); in getMemsetValue()
5746 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value, in getMemsetValue()
5747 DAG.getConstant(Magic, dl, IntVT)); in getMemsetValue()
DSelectionDAGBuilder.cpp282 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); in getCopyFromParts() local
283 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, CC); in getCopyFromParts()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1484 EVT IntVT = MemVT.changeTypeToInteger(); in lowerKernargMemParameter() local
1496 SDValue ArgVal = DAG.getNode(ISD::TRUNCATE, SL, IntVT, Extract); in lowerKernargMemParameter()
4174 EVT IntVT = LoadVT.changeTypeToInteger(); in lowerIntrinsicLoad() local
4190 return getMemIntrinsicNode(Opc, DL, M->getVTList(), Ops, IntVT, in lowerIntrinsicLoad()
4851 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT() local
4858 SDValue ExtVal = DAG.getNode(ISD::BITCAST, SL, IntVT, in lowerINSERT_VECTOR_ELT()
4867 SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec); in lowerINSERT_VECTOR_ELT()
4868 SDValue BFM = DAG.getNode(ISD::SHL, SL, IntVT, in lowerINSERT_VECTOR_ELT()
4869 DAG.getConstant(0xffff, SL, IntVT), in lowerINSERT_VECTOR_ELT()
4872 SDValue LHS = DAG.getNode(ISD::AND, SL, IntVT, BFM, ExtVal); in lowerINSERT_VECTOR_ELT()
[all …]
DAMDGPUISelLowering.cpp1532 MVT IntVT = MVT::i32; in LowerDIVREM24() local
1552 SDValue jq = DAG.getConstant(1, DL, IntVT); in LowerDIVREM24()
1597 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq); in LowerDIVREM24()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp615 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits()); in initActions() local
616 if (IntVT.isValid()) { in initActions()
618 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp961 EVT IntVT = EVT(VecVT).changeVectorElementTypeToInteger(); in PreprocessISelDAG() local
962 Op0 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op0); in PreprocessISelDAG()
963 Op1 = CurDAG->getNode(ISD::BITCAST, dl, IntVT, Op1); in PreprocessISelDAG()
972 Res = CurDAG->getNode(Opc, dl, IntVT, Op0, Op1); in PreprocessISelDAG()
DX86ISelLowering.cpp3635 MVT IntVT = Is64Bit ? MVT::i64 : MVT::i32; in LowerFormalArguments() local
3636 RegParmTypes.push_back(IntVT); in LowerFormalArguments()
36310 EVT IntVT = in combineBitcastvxi1() local
36312 V = DAG.getZExtOrTrunc(V, DL, IntVT); in combineBitcastvxi1()
36330 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), Imm.getBitWidth()); in combinevXi1ConstantToInteger() local
36331 return DAG.getConstant(Imm, SDLoc(Op), IntVT); in combinevXi1ConstantToInteger()
39813 MVT IntVT = is64BitFP ? MVT::i64 : MVT::i32; in combineCompareEqual() local
39826 IntVT = MVT::i32; in combineCompareEqual()
39829 SDValue OnesOrZeroesI = DAG.getBitcast(IntVT, OnesOrZeroesF); in combineCompareEqual()
39830 SDValue ANDed = DAG.getNode(ISD::AND, DL, IntVT, OnesOrZeroesI, in combineCompareEqual()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4982 MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits()); in lowerINSERT_VECTOR_ELT() local
4983 MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements()); in lowerINSERT_VECTOR_ELT()
4986 DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2); in lowerINSERT_VECTOR_ELT()
5009 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits()); in lowerEXTRACT_VECTOR_ELT() local
5010 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
5011 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntVT, in lowerEXTRACT_VECTOR_ELT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp9886 EVT IntVT = BV->getValueType(0); in performVectorCompareAndMaskUnaryOpCombine() local
9891 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst); in performVectorCompareAndMaskUnaryOpCombine()
9892 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT, in performVectorCompareAndMaskUnaryOpCombine()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp7318 EVT IntVT = Op.getValueType(); in LowerGET_DYNAMIC_AREA_OFFSET() local
7325 SDVTList VTs = DAG.getVTList(IntVT); in LowerGET_DYNAMIC_AREA_OFFSET()