| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | LowLevelTypeImpl.h | 85 explicit LLT() : IsPointer(false), IsVector(false), RawData(0) {} in LLT()
91 bool isScalar() const { return isValid() && !IsPointer && !IsVector; } in isScalar()
93 bool isPointer() const { return isValid() && IsPointer && !IsVector; } in isPointer()
95 bool isVector() const { return isValid() && IsVector; } in isVector()
100 assert(IsVector && "cannot get number of elements on scalar/aggregate"); in getNumElements()
144 if (!IsVector) { in getScalarSizeInBits()
160 if (!IsVector) in getAddressSpace()
178 return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
230 uint64_t IsVector : 1;
248 void init(bool IsPointer, bool IsVector, uint16_t NumElements,
[all …]
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 1469 V(pmull, NEON_PMULL, vn.IsVector() && vn.Is8B()) \
1470 V(pmull2, NEON_PMULL2, vn.IsVector() && vn.Is16B()) \
1471 V(saddl, NEON_SADDL, vn.IsVector() && vn.IsD()) \
1472 V(saddl2, NEON_SADDL2, vn.IsVector() && vn.IsQ()) \
1473 V(sabal, NEON_SABAL, vn.IsVector() && vn.IsD()) \
1474 V(sabal2, NEON_SABAL2, vn.IsVector() && vn.IsQ()) \
1475 V(uabal, NEON_UABAL, vn.IsVector() && vn.IsD()) \
1476 V(uabal2, NEON_UABAL2, vn.IsVector() && vn.IsQ()) \
1477 V(sabdl, NEON_SABDL, vn.IsVector() && vn.IsD()) \
1478 V(sabdl2, NEON_SABDL2, vn.IsVector() && vn.IsQ()) \
[all …]
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| D | register-arm64.h | 384 DCHECK(!(Is8Bits() && IsVector())); in Is1B()
388 DCHECK(!(Is16Bits() && IsVector())); in Is1H()
392 DCHECK(!(Is32Bits() && IsVector())); in Is1S()
402 bool IsVector() const { return lane_count_ > 1; } in IsVector() function
|
| /third_party/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 2038 VIXL_ASSERT(vt.IsVector() || vt.Is1D()); in LoadStoreStruct()
2426 V(pmull, NEON_PMULL, vn.IsVector() && vn.Is8B()) \
2427 V(pmull2, NEON_PMULL2, vn.IsVector() && vn.Is16B()) \
2428 V(saddl, NEON_SADDL, vn.IsVector() && vn.IsD()) \
2429 V(saddl2, NEON_SADDL2, vn.IsVector() && vn.IsQ()) \
2430 V(sabal, NEON_SABAL, vn.IsVector() && vn.IsD()) \
2431 V(sabal2, NEON_SABAL2, vn.IsVector() && vn.IsQ()) \
2432 V(uabal, NEON_UABAL, vn.IsVector() && vn.IsD()) \
2433 V(uabal2, NEON_UABAL2, vn.IsVector() && vn.IsQ()) \
2434 V(sabdl, NEON_SABDL, vn.IsVector() && vn.IsD()) \
[all …]
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| D | registers-aarch64.h | 259 bool IsVector() const { return HasLaneSize() && (size_ != lane_size_); } in IsVector() function
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.cpp | 1907 const bool IsVector = isVectorType(Ty); in emitSingleDestSingleSource() local
1910 const bool IsVMove = (IsVector || IsScalarFP || CoreVFPMove); in emitSingleDestSingleSource()
1917 if (IsVector) in emitSingleDestSingleSource()
2253 const bool IsVector = isVectorType(Ty); in emit() local
2256 IsVector ? "vld1" : (IsScalarFloat ? "vldr" : "ldr"); in emit()
2257 const char *WidthString = IsVector ? "" : getWidthString(Ty); in emit()
2259 const bool IsVInst = IsVector || IsScalarFloat; in emit()
2265 if (IsVector) in emit()
2281 const bool IsVector = isVectorType(Ty); in emit() local
2284 IsVector ? "vld1" : (IsScalarFloat ? "vldr" : "ldr"); in emit()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | LowLevelType.cpp | 31 IsVector = false; in LLT()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 176 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
178 if (!IsReduction && !IsVector && !IsCube) { in runOnMachineFunction()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMELFStreamer.cpp | 1453 bool IsVector) { in emitRegSave() argument
1460 assert(Reg < (IsVector ? 32U : 16U) && "Register out of range"); in emitRegSave()
1472 SPOffset -= Count * (IsVector ? 8 : 4); in emitRegSave()
1476 if (IsVector) in emitRegSave()
|
| /third_party/skia/third_party/externals/tint/src/reader/wgsl/ |
| D | token.h | 417 bool IsVector() const { in IsVector() function
|
| D | parser_impl.cc | 1063 if (t.IsVector()) { in type_decl()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 422 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
11203 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave() argument
11218 if (!IsVector && !Op.isRegList()) in parseDirectiveRegSave()
11220 if (IsVector && !Op.isDPRRegList()) in parseDirectiveRegSave()
11223 getTargetStreamer().emitRegSave(Op.getRegList(), IsVector); in parseDirectiveRegSave()
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