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Searched refs:LIS (Results 1 – 25 of 106) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp102 LiveIntervals &LIS) { in convertImplicitDefToConstZero() argument
129 LIS.InsertMachineInstrInMaps(*Const); in convertImplicitDefToConstZero()
271 const LiveIntervals &LIS) { in getVRegDef() argument
277 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in getVRegDef()
278 LIS.getInstructionIndex(*Insert))) in getVRegDef()
279 return LIS.getInstructionFromIndex(ValNo->def); in getVRegDef()
288 MachineDominatorTree &MDT, LiveIntervals &LIS) { in hasOneUse() argument
294 const LiveInterval &LI = LIS.getInterval(Reg); in hasOneUse()
296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
299 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in hasOneUse()
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DWebAssemblyMemIntrinsicResults.cpp88 LiveIntervals &LIS) { in replaceDominatedUses() argument
91 LiveInterval *FromLI = &LIS.getInterval(FromReg); in replaceDominatedUses()
92 LiveInterval *ToLI = &LIS.getInterval(ToReg); in replaceDominatedUses()
94 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot(); in replaceDominatedUses()
109 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where); in replaceDominatedUses()
134 LIS.extendToIndices(*ToLI, Indices); in replaceDominatedUses()
137 LIS.shrinkToUses(FromLI); in replaceDominatedUses()
151 MachineDominatorTree &MDT, LiveIntervals &LIS, in optimizeCall() argument
174 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); in optimizeCall()
189 auto &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
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DWebAssemblyOptimizeLiveIntervals.cpp74 auto &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
88 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs); in runOnMachineFunction()
99 LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg()); in runOnMachineFunction()
100 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot()); in runOnMachineFunction()
101 LIS.RemoveMachineInstrFromMaps(*MI); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSILowerControlFlow.cpp82 LiveIntervals *LIS = nullptr; member in __anon86f0e7a80111::SILowerControlFlow
252 if (!LIS) { in emitIf()
257 LIS->InsertMachineInstrInMaps(*CopyExec); in emitIf()
261 LIS->ReplaceMachineInstrInMaps(MI, *And); in emitIf()
264 LIS->InsertMachineInstrInMaps(*Xor); in emitIf()
265 LIS->InsertMachineInstrInMaps(*SetExec); in emitIf()
266 LIS->InsertMachineInstrInMaps(*NewBr); in emitIf()
268 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in emitIf()
274 LIS->removeInterval(SaveExecReg); in emitIf()
275 LIS->createAndComputeVirtRegInterval(SaveExecReg); in emitIf()
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DGCNRegPressure.h103 const LiveIntervals &LIS;
109 GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {} in GCNRPTracker()
189 const LiveIntervals &LIS,
193 const LiveIntervals &LIS,
203 getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) { in getLiveRegMap() argument
206 auto &SII = *LIS.getSlotIndexes(); in getLiveRegMap()
218 if (!LIS.hasInterval(Reg)) in getLiveRegMap()
220 auto &LI = LIS.getInterval(Reg); in getLiveRegMap()
241 const LiveIntervals &LIS) { in getLiveRegsAfter() argument
242 return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS, in getLiveRegsAfter()
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DSIOptimizeExecMaskingPreRA.cpp192 LiveIntervals *LIS) { in optimizeVcndVcmpPair() argument
209 *I, MRI, LIS); in optimizeVcndVcmpPair()
225 auto *Cmp = TRI->findReachingDef(CmpReg, CmpSubReg, *And, MRI, LIS); in optimizeVcndVcmpPair()
239 auto *Sel = TRI->findReachingDef(SelReg, Op1->getSubReg(), *Cmp, MRI, LIS); in optimizeVcndVcmpPair()
258 LIS->RemoveMachineInstrFromMaps(*And); in optimizeVcndVcmpPair()
265 LIS->InsertMachineInstrInMaps(*Andn2); in optimizeVcndVcmpPair()
279 LIS->RemoveMachineInstrFromMaps(*Cmp); in optimizeVcndVcmpPair()
286 LIS->RemoveMachineInstrFromMaps(*Sel); in optimizeVcndVcmpPair()
304 LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
311 if (unsigned Reg = optimizeVcndVcmpPair(MBB, ST, MRI, LIS)) { in runOnMachineFunction()
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DGCNRegPressure.cpp37 const LiveIntervals &LIS, in printLivesAt() argument
40 << *LIS.getInstructionFromIndex(SI); in printLivesAt()
44 if (!LIS.hasInterval(Reg)) in printLivesAt()
46 const auto &LI = LIS.getInterval(Reg); in printLivesAt()
212 const LiveIntervals &LIS) { in getUsedRegMask() argument
225 auto SI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex(); in getUsedRegMask()
226 return getLiveLaneMask(MO.getReg(), SI, LIS, MRI); in getUsedRegMask()
230 collectVirtualRegUses(const MachineInstr &MI, const LiveIntervals &LIS, in collectVirtualRegUses() argument
239 auto const UsedMask = getUsedRegMask(MO, MRI, LIS); in collectVirtualRegUses()
258 const LiveIntervals &LIS, in getLiveLaneMask() argument
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DGCNIterativeScheduler.cpp63 const LiveIntervals *LIS, in printRegion() argument
72 if (!I->isDebugInstr() && LIS) in printRegion()
73 OS << LIS->getInstructionIndex(*I); in printRegion()
79 if (!I->isDebugInstr() && LIS) in printRegion()
80 OS << LIS->getInstructionIndex(*I); in printRegion()
85 if (LIS) OS << LIS->getInstructionIndex(*End) << '\t'; in printRegion()
94 const LiveIntervals *LIS) { in printLivenessInfo() argument
98 const auto LiveIns = getLiveRegsBefore(*Begin, *LIS); in printLivenessInfo()
103 const auto LiveOuts = getLiveRegsAfter(*BottomMI, *LIS); in printLivenessInfo()
113 printRegion(OS, R->Begin, R->End, LIS, 1); in printRegions()
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DSILowerSGPRSpills.cpp52 LiveIntervals *LIS = nullptr; member in __anon765f9ba20111::SILowerSGPRSpills
90 LiveIntervals *LIS) { in insertCSRSaves() argument
108 if (LIS) { in insertCSRSaves()
112 LIS->InsertMachineInstrInMaps(Inst); in insertCSRSaves()
113 LIS->removeAllRegUnitsForPhysReg(Reg); in insertCSRSaves()
122 LiveIntervals *LIS) { in insertCSRRestores() argument
144 if (LIS) { in insertCSRRestores()
146 LIS->InsertMachineInstrInMaps(Inst); in insertCSRRestores()
147 LIS->removeAllRegUnitsForPhysReg(Reg); in insertCSRRestores()
220 insertCSRSaves(*SaveBlock, CSI, LIS); in spillCalleeSavedRegs()
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DSIWholeQuadMode.cpp154 LiveIntervals *LIS; member in __anon42324b750111::SIWholeQuadMode
288 LiveRange &LR = LIS->getRegUnit(*RegUnit); in markInstructionUses()
289 const VNInfo *Value = LR.Query(LIS->getInstructionIndex(MI)).valueIn(); in markInstructionUses()
298 markInstruction(*LIS->getInstructionFromIndex(Value->def), Flag, in markInstructionUses()
570 LIS->InsertMachineInstrInMaps(*Save); in saveSCC()
571 LIS->InsertMachineInstrInMaps(*Restore); in saveSCC()
572 LIS->createAndComputeVirtRegInterval(SaveReg); in saveSCC()
586 LiveRange &LR = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::SCC, TRI)); in prepareInsertion()
588 SlotIndex FirstIdx = First != MBBE ? LIS->getInstructionIndex(*First) in prepareInsertion()
589 : LIS->getMBBEndIdx(&MBB); in prepareInsertion()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveRangeEdit.cpp39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
46 LiveInterval &OldLI = LIS.getInterval(OldReg); in createEmptyIntervalFrom()
47 VNInfo::Allocator &Alloc = LIS.getVNInfoAllocator(); in createEmptyIntervalFrom()
66 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
86 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable()
123 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
151 DefIdx = LIS.getInstructionIndex(*RM.OrigMI); in canRematerializeAt()
177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
182 LIS.removeInterval(Reg); in eraseVirtReg()
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DPHIElimination.cpp70 LiveIntervals *LIS; member in __anonbb924ec50111::PHIElimination
150 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
158 if (!DisableEdgeSplitting && (LV || LIS)) { in runOnMachineFunction()
175 if (LIS) in runOnMachineFunction()
176 LIS->RemoveMachineInstrFromMaps(*DefMI); in runOnMachineFunction()
183 if (LIS) in runOnMachineFunction()
184 LIS->RemoveMachineInstrFromMaps(*I.first); in runOnMachineFunction()
327 if (LIS) { in LowerPHINode()
328 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(*PHICopy); in LowerPHINode()
330 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB); in LowerPHINode()
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DLiveDebugVariables.cpp178 unsigned SpillOffset, LiveIntervals &LIS,
185 LiveIntervals &LIS);
316 LiveIntervals &LIS);
331 MachineRegisterInfo &MRI, LiveIntervals &LIS);
336 LiveIntervals &LIS, LexicalScopes &LS);
341 LiveIntervals &LIS);
352 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
372 LiveIntervals &LIS, const TargetInstrInfo &TII);
386 void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII);
399 LiveIntervals *LIS; member in __anonaaf3099b0211::LDVImpl
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DSplitKit.cpp73 : LIS(lis), LastInsertPoint(BBNum) {} in InsertPointAnalysis()
80 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); in computeLastInsertPoint()
94 LIP.first = LIS.getInstructionIndex(*FirstTerm); in computeLastInsertPoint()
105 LIP.second = LIS.getInstructionIndex(*I); in computeLastInsertPoint()
117 return LIS.isLiveInToMBB(CurLI, EHPad); in computeLastInsertPoint()
142 if (LIP == LIS.getMBBEndIdx(&MBB)) in getLastInsertPointIter()
144 return LIS.getInstructionFromIndex(LIP); in getLastInsertPointIter()
153 : MF(vrm.getMachineFunction()), VRM(vrm), LIS(lis), Loops(mli), in SplitAnalysis()
178 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); in analyzeUses()
195 const_cast<LiveIntervals&>(LIS) in analyzeUses()
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DInlineSpiller.cpp87 LiveIntervals &LIS; member in __anon35858e650111::HoistSpillHelper
141 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in HoistSpillHelper()
149 IPA(LIS, mf.getNumBlockIDs()) {} in HoistSpillHelper()
160 LiveIntervals &LIS; member in __anon35858e650111::InlineSpiller
197 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), in InlineSpiller()
284 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) in isSnippet()
336 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
373 SlotIndex Idx = LIS.getInstructionIndex(CopyMI); in hoistSpillInsideBB()
380 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
383 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(SrcVNI->def); in hoistSpillInsideBB()
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DTwoAddressInstructionPass.cpp99 LiveIntervals *LIS; member in __anon6c6b73e40111::TwoAddressInstructionPass
210 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
251 if (LIS) { in sink3AddrInstruction()
252 LiveInterval &LI = LIS->getInterval(SavedReg); in sink3AddrInstruction()
256 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in sink3AddrInstruction()
262 KillMI = LIS->getInstructionFromIndex(I->end); in sink3AddrInstruction()
308 if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) { in sink3AddrInstruction()
321 if (!LIS) { in sink3AddrInstruction()
335 if (LIS) in sink3AddrInstruction()
336 LIS->handleMove(*MI); in sink3AddrInstruction()
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DRegisterCoalescer.cpp131 LiveIntervals *LIS = nullptr; member in __anon158514010111::RegisterCoalescer
326 if (LIS->shrinkToUses(LI, Dead)) { in shrinkToUses()
330 LIS->splitSeparateComponents(*LI, SplitLIs); in shrinkToUses()
340 LIS->RemoveMachineInstrFromMaps(*MI); in deleteInstr()
575 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, in eliminateDeadDefs()
590 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in adjustCopiesBackFrom()
592 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in adjustCopiesBackFrom()
593 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot(); in adjustCopiesBackFrom()
629 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); in adjustCopiesBackFrom()
643 LIS->getInstructionFromIndex(ValS->end.getPrevSlot()); in adjustCopiesBackFrom()
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DCalcSpillWeights.cpp31 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS, in calculateSpillWeightsAndHints() argument
41 VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm); in calculateSpillWeightsAndHints()
46 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg)); in calculateSpillWeightsAndHints()
86 const LiveIntervals &LIS, in isRematerializable() argument
99 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); in isRematerializable()
121 const LiveInterval &SrcLI = LIS.getInterval(Reg); in isRematerializable()
127 MI = LIS.getInstructionFromIndex(VNI->def); in isRematerializable()
132 if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis())) in isRematerializable()
173 MachineBasicBlock *localMBB = LIS.getMBBFromIndex(*end); in weightCalcHelper()
174 assert(localMBB == LIS.getMBBFromIndex(*start) && in weightCalcHelper()
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DRegAllocPBQP.cpp163 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS);
170 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
182 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS,
185 void postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS);
194 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
202 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; in apply()
311 LiveIntervals &LIS = G.getMetadata().LIS; in apply() local
335 LiveInterval &LI = LIS.getInterval(VReg); in apply()
556 LiveIntervals &LIS) { in findVRegIntervalsToAlloc() argument
581 LiveIntervals &LIS = G.getMetadata().LIS; in initializeGraph() local
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DRenameIndependentSubregs.cpp72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, in SubRangeInfo()
74 : ConEQ(LIS), SR(&SR), Index(Index) {} in SubRangeInfo()
104 LiveIntervals *LIS; member in __anondbabe74c0111::RenameIndependentSubregs
143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); in INITIALIZE_PASS_DEPENDENCY()
162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); in findComponents()
189 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()); in findComponents()
223 SlotIndex Pos = LIS->getInstructionIndex(*MI); in rewriteOperands()
271 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); in distribute()
303 BumpPtrAllocator &Allocator = LIS->getVNInfoAllocator(); in computeMainRangesFixFlags()
304 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in computeMainRangesFixFlags()
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DRegAllocBase.cpp63 LIS = &lis; in init()
79 enqueue(&LIS->getInterval(Reg)); in seedLiveRegs()
96 LIS->removeInterval(VirtReg->reg); in allocatePhysRegs()
145 assert(LIS->hasInterval(Reg)); in allocatePhysRegs()
147 LiveInterval *SplitVirtReg = &LIS->getInterval(Reg); in allocatePhysRegs()
153 LIS->removeInterval(SplitVirtReg->reg); in allocatePhysRegs()
168 LIS->RemoveMachineInstrFromMaps(*DeadInst); in postOptimization()
DRegisterPressure.cpp237 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { in getLiveRange() argument
239 return &LIS.getInterval(Reg); in getLiveRange()
240 return LIS.getCachedRegUnit(Reg); in getLiveRange()
245 LIS = nullptr; in reset()
281 LIS = lis; in init()
314 return LIS->getMBBEndIdx(MBB); in getCurrSlot()
315 return LIS->getInstructionIndex(*IdxPos).getRegSlot(); in getCurrSlot()
421 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, in getLanesWithProperty() argument
426 const LiveInterval &LI = LIS.getInterval(RegUnit); in getLanesWithProperty()
440 const LiveRange *LR = LIS.getCachedRegUnit(RegUnit); in getLanesWithProperty()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCVSXFMAMutate.cpp67 LiveIntervals *LIS; member
109 SlotIndex FMAIdx = LIS->getInstructionIndex(MI); in processBlock()
112 LIS->getInterval(MI.getOperand(1).getReg()).Query(FMAIdx).valueIn(); in processBlock()
118 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); in processBlock()
192 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() in processBlock()
196 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() in processBlock()
213 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) in processBlock()
281 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); in processBlock()
299 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); in processBlock()
308 LIS->getVNInfoAllocator()); in processBlock()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp169 LiveIntervals *LIS = nullptr; member in __anonf1a85c830111::HexagonExpandCondsets
318 MachineInstr *MI = LIS->getInstructionFromIndex(K); in updateKillFlags()
334 LiveInterval &LI = LIS->getInterval(Reg); in updateKillFlags()
342 MachineInstr *DefI = LIS->getInstructionFromIndex(NextI->start); in updateKillFlags()
419 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange()
426 LiveInterval &LI = LIS->getInterval(Reg); in updateDeadsInRange()
427 LI.computeSubRangeUndefs(Undefs, LM, *MRI, *LIS->getSlotIndexes()); in updateDeadsInRange()
430 MachineBasicBlock *BB = LIS->getMBBFromIndex(SI); in updateDeadsInRange()
431 auto P = Range.extendInBlock(Undefs, LIS->getMBBStartIdx(BB), SI); in updateDeadsInRange()
442 MachineBasicBlock *BB = LIS->getMBBFromIndex(SI); in updateDeadsInRange()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DModuloSchedule.h167 LiveIntervals &LIS; variable
256 LiveIntervals &LIS, InstrChangesTy InstrChanges) in ModuloScheduleExpander() argument
258 TII(ST.getInstrInfo()), LIS(LIS), in ModuloScheduleExpander()
279 LiveIntervals *LIS; variable
310 LiveIntervals *LIS) in PeelingModuloScheduleExpander() argument
312 TII(ST.getInstrInfo()), LIS(LIS) {} in PeelingModuloScheduleExpander()

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