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Searched refs:LoadStoreOp (Results 1 – 19 of 19) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
Dinstructions-arm64.cc21 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
52 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
156 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
Dinstructions-arm64.h53 unsigned CalcLSDataSize(LoadStoreOp op);
147 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in SizeLS()
Dassembler-arm64-inl.h765 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) {
787 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) {
1034 unsigned Assembler::CalcLSDataSize(LoadStoreOp op) {
Dassembler-arm64.h2204 inline static unsigned CalcLSDataSize(LoadStoreOp op);
2459 void LoadStore(const CPURegister& rt, const MemOperand& addr, LoadStoreOp op);
2507 static inline LoadStoreOp LoadOpFor(const CPURegister& rt);
2510 static inline LoadStoreOp StoreOpFor(const CPURegister& rt);
Dconstants-arm64.h914 enum LoadStoreOp : uint32_t { enum
Dmacro-assembler-arm64.h1517 LoadStoreOp op);
Dmacro-assembler-arm64.cc861 const MemOperand& addr, LoadStoreOp op) { in LoadStoreMacro()
Dassembler-arm64.cc3952 LoadStoreOp op) { in LoadStore()
/third_party/vixl/src/aarch64/
Dinstructions-aarch64.cc492 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
524 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
837 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
Dinstructions-aarch64.h164 unsigned CalcLSDataSize(LoadStoreOp op);
419 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in GetSizeLS()
Dassembler-aarch64.h7663 LoadStoreOp op,
7932 static LoadStoreOp LoadOpFor(const CPURegister& rt);
7935 static LoadStoreOp StoreOpFor(const CPURegister& rt);
Dassembler-aarch64.cc5812 LoadStoreOp op, in LoadStore()
6179 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) { in LoadOpFor()
6202 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) { in StoreOpFor()
Dmacro-assembler-aarch64.cc2013 LoadStoreOp op) { in Emit()
Dconstants-aarch64.h1127 enum LoadStoreOp { enum
Dsimulator-aarch64.cc4130 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in Simulator()
Dmacro-assembler-aarch64.h920 LoadStoreOp op);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp585 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore() local
587 if (LoadStoreOp == -1) in buildMUBUFOffsetLoadStore()
595 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildMUBUFOffsetLoadStore()
615 unsigned LoadStoreOp, in buildSpillLoadStore() argument
629 const MCInstrDesc &Desc = TII->get(LoadStoreOp); in buildSpillLoadStore()
DSIRegisterInfo.h295 unsigned LoadStoreOp,
/third_party/node/deps/v8/src/execution/arm64/
Dsimulator-arm64.cc2026 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in LoadStoreHelper()