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Searched refs:MESA_SHADER_TASK (Results 1 – 25 of 34) sorted by relevance

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/third_party/mesa3d/src/compiler/
Dshader_enums.c46 ENUM(MESA_SHADER_TASK), in gl_shader_stage_name()
75 case MESA_SHADER_TASK: return "task"; in _mesa_shader_stage_to_string()
103 case MESA_SHADER_TASK: return "TASK"; in _mesa_shader_stage_to_abbrev()
175 case MESA_SHADER_TASK: in gl_varying_slot_name_for_stage()
Dshader_enums.h58 MESA_SHADER_TASK = 6, enumerator
80 return stage == MESA_SHADER_TASK || in gl_shader_stage_is_mesh()
89 stage == MESA_SHADER_TASK || in gl_shader_stage_uses_workgroup()
/third_party/mesa3d/src/intel/compiler/
Dbrw_compiler.c132 for (int i = MESA_SHADER_TASK; i < MESA_VULKAN_SHADER_STAGES; i++) in brw_compiler_create()
246 [MESA_SHADER_TASK] = sizeof(struct brw_task_prog_data), in brw_prog_data_size()
270 [MESA_SHADER_TASK] = sizeof(struct brw_task_prog_key), in brw_prog_key_size()
Dbrw_mesh.cpp206 prog_data->base.base.stage = MESA_SHADER_TASK; in brw_compile_task()
276 &prog_data->base.base, false, MESA_SHADER_TASK); in brw_compile_task()
816 if (bld.shader->stage == MESA_SHADER_TASK) { in get_mesh_urb_handle()
1162 assert(stage == MESA_SHADER_TASK); in nir_emit_task_intrinsic()
1211 assert(stage == MESA_SHADER_MESH || stage == MESA_SHADER_TASK); in nir_emit_task_mesh_intrinsic()
Dbrw_shader.h157 stage != MESA_SHADER_TASK && in brw_nir_no_indirect_mask()
Dbrw_nir_lower_cs_intrinsics.c71 if (nir->info.stage == MESA_SHADER_TASK || in lower_cs_intrinsics_convert_block()
Dbrw_compiler.h1529 DEFINE_PROG_DATA_DOWNCAST(task, prog_data->stage == MESA_SHADER_TASK)
Dbrw_nir.c1009 producer->info.stage != MESA_SHADER_TASK) { in brw_nir_link_shaders()
/third_party/mesa3d/src/amd/vulkan/
Dradv_shader_args.c164 if (stage == MESA_SHADER_TASK) in allocate_user_sgprs()
173 case MESA_SHADER_TASK: in allocate_user_sgprs()
231 gfx_level >= GFX9 && stage != MESA_SHADER_COMPUTE && stage != MESA_SHADER_TASK ? 32 : 16; in allocate_user_sgprs()
563 if (stage == MESA_SHADER_TASK) { in radv_declare_shader_args()
573 case MESA_SHADER_TASK: in radv_declare_shader_args()
815 if (stage == MESA_SHADER_TASK) { in radv_declare_shader_args()
833 case MESA_SHADER_TASK: in radv_declare_shader_args()
Dradv_shader.c1012 nir->info.stage == MESA_SHADER_TASK || in radv_shader_spirv_to_nir()
1016 if (nir->info.stage == MESA_SHADER_TASK || in radv_shader_spirv_to_nir()
1200 } else if (nir->info.stage == MESA_SHADER_TASK) { in radv_lower_io_to_mem()
1798 case MESA_SHADER_TASK: in radv_postprocess_config()
2634 case MESA_SHADER_TASK:
2658 } else if (stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_TASK) {
Dradv_nir_lower_abi.c44 b->shader->info.stage == MESA_SHADER_TASK ? in load_ring()
Dradv_shader_info.c603 case MESA_SHADER_TASK: in radv_nir_shader_info_pass()
611 if (nir->info.stage == MESA_SHADER_TASK) { in radv_nir_shader_info_pass()
Dradv_cmd_buffer.c869 radv_pipeline_has_stage(cmd_buffer->state.graphics_pipeline, MESA_SHADER_TASK)) { in radv_cmd_buffer_after_draw()
3467 if (radv_pipeline_has_stage(graphics_pipeline, MESA_SHADER_TASK)) in radv_flush_indirect_descriptor_sets()
3468 radv_emit_userdata_address(device, cmd_buffer->ace_internal.cs, pipeline, MESA_SHADER_TASK, in radv_flush_indirect_descriptor_sets()
3525 descriptors_state, MESA_SHADER_TASK); in radv_flush_descriptors()
3620 MESA_SHADER_TASK, (uint32_t *)cmd_buffer->push_constants, in radv_flush_constants()
3654 radv_emit_userdata_address(device, cmd_buffer->ace_internal.cs, pipeline, MESA_SHADER_TASK, in radv_flush_constants()
5620 if (radv_pipeline_has_stage(graphics_pipeline, MESA_SHADER_TASK)) { in radv_CmdBindPipeline()
6585 radv_emit_view_index_per_stage(cmd_buffer->ace_internal.cs, pipeline, MESA_SHADER_TASK, in radv_emit_view_index()
6737 struct radv_shader *compute_shader = radv_get_shader(pipeline, MESA_SHADER_TASK); in radv_cs_emit_dispatch_taskmesh_direct_ace_packet()
6744 radv_lookup_user_sgpr(pipeline, MESA_SHADER_TASK, AC_UD_TASK_RING_ENTRY); in radv_cs_emit_dispatch_taskmesh_direct_ace_packet()
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Dradv_pipeline.c2961 if (stages[MESA_SHADER_TASK].nir) { in radv_link_shaders()
2962 ordered_shaders[shader_count++] = stages[MESA_SHADER_TASK].nir; in radv_link_shaders()
3400 else if (stage == MESA_SHADER_TASK) in radv_get_wave_size()
3688 if (stages[MESA_SHADER_TASK].nir) { in radv_fill_shader_info()
3690 stages[MESA_SHADER_TASK].info.cs.uses_task_rings = true; in radv_fill_shader_info()
3693 stages[MESA_SHADER_TASK].info.workgroup_size = in radv_fill_shader_info()
3695 stages[MESA_SHADER_TASK].nir->info.workgroup_size, false, UINT32_MAX); in radv_fill_shader_info()
4876 … stages[i].nir, io_to_mem || lowered_ngg || i == MESA_SHADER_COMPUTE || i == MESA_SHADER_TASK); in radv_create_shaders()
5051 case MESA_SHADER_TASK: in radv_pipeline_stage_to_user_data_0()
7460 case MESA_SHADER_TASK: in radv_GetPipelineExecutablePropertiesKHR()
/third_party/mesa3d/src/compiler/spirv/
Dspirv2nir.c65 return MESA_SHADER_TASK; in stage_to_enum()
/third_party/mesa3d/src/intel/dev/
Dintel_debug.c112 [MESA_SHADER_TASK] = DEBUG_TASK, in intel_debug_flag_for_shader_stage()
/third_party/mesa3d/src/compiler/nir/
Dnir_lower_task_shader.c382 if (shader->info.stage != MESA_SHADER_TASK) in nir_lower_task_shader()
Dnir_lower_io_to_temporaries.c332 shader->info.stage == MESA_SHADER_TASK || in nir_lower_io_to_temporaries()
Dnir_lower_io_to_vector.c394 case MESA_SHADER_TASK: in nir_shader_can_read_output()
Dnir_print.c643 case MESA_SHADER_TASK: in print_var_decl()
1718 shader->info.stage == MESA_SHADER_TASK) { in nir_print_shader_annotated()
Dnir_divergence_analysis.c224 case MESA_SHADER_TASK: in visit_intrinsic()
/third_party/mesa3d/src/amd/common/
Dac_nir_lower_taskmesh_io_to_mem.c325 b->shader->info.stage == MESA_SHADER_TASK ? in lower_taskmesh_payload_load()
/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection_setup.cpp349 case MESA_SHADER_TASK: { in setup_variables()
842 case MESA_SHADER_TASK: sw_stage = sw_stage | SWStage::TS; break; in setup_isel_context()
/third_party/mesa3d/src/intel/vulkan/
DgenX_pipeline.c328 anv_pipeline_has_stage(pipeline, MESA_SHADER_TASK) ? in emit_urb_setup_mesh()
2172 if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TASK)) { in emit_task_state()
2177 const struct anv_shader_bin *task_bin = pipeline->shaders[MESA_SHADER_TASK]; in emit_task_state()
2182 get_scratch_surf(&pipeline->base, MESA_SHADER_TASK, task_bin); in emit_task_state()
Danv_pipeline.c1054 assert(prev_stage->stage == MESA_SHADER_TASK); in anv_pipeline_compile_mesh()
1357 case MESA_SHADER_TASK: in anv_graphics_pipeline_init_keys()
1461 MESA_SHADER_TASK,
1576 case MESA_SHADER_TASK: in anv_graphics_pipeline_compile()
1696 case MESA_SHADER_TASK: in anv_graphics_pipeline_compile()

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