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Searched refs:MIPS32 (Results 1 – 25 of 29) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceInstMIPS32.cpp26 namespace MIPS32 { namespace
184 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
343 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
491 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
516 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
607 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
633 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
638 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
643 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
648 auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>(); in emitIAS()
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DIceTargetLoweringMIPS32.def1 //===- subzero/src/IceTargetLoweringMIPS32.def -MIPS32 X-macros -*- C++ -*-===//
10 // This file defines certain patterns for lowering to MIPS32 target
DSZTargets.def36 SUBZERO_TARGET(MIPS32)
DIceRegistersMIPS32.h24 namespace MIPS32 {
DIceInstMIPS32.def10 // This file defines properties of MIPS32 instructions in the form of x-macros.
22 // MIPS32. n indicates how many aliases are being provided to the macro. It
DIceTargetLoweringMIPS32.h26 namespace MIPS32 {
52 return makeUnique<MIPS32::AssemblerMIPS32>(); in createAssembler()
DIceAssemblerMIPS32.h25 namespace MIPS32 {
DIceAssemblerMIPS32.cpp23 using namespace Ice::MIPS32;
35 namespace MIPS32 { namespace
DIceTargetLoweringMIPS32.cpp33 namespace MIPS32 { namespace
35 return ::Ice::MIPS32::TargetMIPS32::create(Func); in createTargetLowering()
40 return ::Ice::MIPS32::TargetDataMIPS32::create(Ctx); in createTargetDataLowering()
45 return ::Ice::MIPS32::TargetHeaderMIPS32::create(Ctx); in createTargetHeaderLowering()
49 ::Ice::MIPS32::TargetMIPS32::staticInit(Ctx); in staticInit()
53 return ::Ice::MIPS32::TargetMIPS32::shouldBePooled(C); in shouldBePooled()
57 return ::Ice::MIPS32::TargetMIPS32::getPointerType(); in getPointerType()
63 namespace MIPS32 { namespace
DIceInstMIPS32.h29 namespace MIPS32 {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DRelocation.txt52 to MIPS32 to compute addresses for the static relocation model.
80 for the difference in the results of instruction execution. On MIPS32,
DMips.td105 "Subset of MIPS-III that is also in MIPS32 "
116 "Subset of MIPS-IV that is also in MIPS32 "
DMSA.txt52 On MIPS32, the copy_u.d intrinsic will emit this instruction instead of
DMips64r6InstrInfo.td306 // MIPS32 arithmetic instructions sign extend their result implicitly.
DMipsInstrInfo.td386 // The portions of MIPS-III that were also added to MIPS32
392 // The portions of MIPS-III that were also added to MIPS32 but were removed in
399 // The portions of MIPS-III that were also added to MIPS32
405 // The portions of MIPS-IV that were also added to MIPS32.
411 // The portions of MIPS-IV that were also added to MIPS32 but were removed in
DMips64InstrInfo.td907 // MIPS32 arithmetic instructions sign extend their result implicitly.
DMipsScheduleGeneric.td603 // MIPS32 EVA
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/crosstest/
Dtest_calling_conv_main.cpp72 #ifdef MIPS32 in testCaller()
Dtest_sync_atomic_main.cpp193 #if defined(ARM32) || defined(MIPS32) in threadWrapper()
/third_party/skia/third_party/externals/swiftshader/src/Reactor/
DBUILD.gn81 "SZTARGET=MIPS32",
82 "SUBZERO_TARGET=MIPS32",
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/
DCMakeLists.txt76 set(SUBZERO_TARGET_CPU MIPS32)
/third_party/skia/third_party/externals/libwebp/cmake/
Dcpu.cmake39 set(WEBP_SIMD_FLAGS "SSE41;SSE2;MIPS32;MIPS_DSP_R2;NEON;MSA")
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeView.h89 MIPS32 = 0x12, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/
DEnumTables.cpp147 CV_ENUM_CLASS_ENT(CPUType, MIPS32),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc104 …{ "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", Mips::FeatureMips…
107 …{ "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", Mips::FeatureMips4…

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