| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 96 ISD::MemIndexedMode &AM,
100 SDValue &Offset, ISD::MemIndexedMode &AM,
|
| D | AVRISelDAGToDAG.cpp | 123 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedLoad()
170 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedProgMemLoad()
|
| D | AVRISelLowering.cpp | 774 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
831 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 1027 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2193 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2206 ISD::MemIndexedMode getAddressingMode() const {
2207 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2227 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2255 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2288 ISD::MemIndexedMode AM, EVT MemVT,
2310 ISD::MemIndexedMode getAddressingMode() const {
2311 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2332 ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
[all …]
|
| D | SelectionDAG.h | 1119 SDValue Offset, ISD::MemIndexedMode AM);
1120 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1126 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1149 SDValue Offset, ISD::MemIndexedMode AM);
1153 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1156 SDValue Offset, ISD::MemIndexedMode AM);
1159 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1163 ISD::MemIndexedMode AM);
|
| D | ISDOpcodes.h | 985 enum MemIndexedMode { enum
|
| D | BasicTTIImpl.h | 174 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) { in getISDIndexedMode()
248 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedLoadLegal()
254 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedStoreLegal()
|
| D | TargetLowering.h | 2980 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
2991 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfo.h | 1085 enum MemIndexedMode { enum
1094 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1097 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
1377 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
1378 virtual bool isIndexedStoreLegal(MemIndexedMode Mode,Type *Ty) const = 0;
1832 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedLoadLegal()
1835 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedStoreLegal()
|
| D | TargetTransformInfoImpl.h | 566 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedLoadLegal()
571 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedStoreLegal()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 803 ISD::MemIndexedMode &AM, bool &IsInc,
806 ISD::MemIndexedMode &AM,
809 SDValue &Offset, ISD::MemIndexedMode &AM,
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 181 ISD::MemIndexedMode &AM,
|
| D | MSP430ISelDAGToDAG.cpp | 299 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
|
| D | MSP430ISelLowering.cpp | 1342 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 402 ISD::MemIndexedMode &AM,
409 SDValue &Offset, ISD::MemIndexedMode &AM,
|
| D | ARMISelDAGToDAG.cpp | 790 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
826 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
846 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
925 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1045 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1327 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1379 ISD::MemIndexedMode AM; in SelectT2AddrModeImm7Offset()
1523 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryARMIndexedLoad()
1603 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT1IndexedLoad()
1629 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT2IndexedLoad()
[all …]
|
| D | ARMInstrMVE.td | 5964 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
5969 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
6048 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
6063 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 794 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, in isIndexedLoadLegal()
799 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, in isIndexedStoreLegal()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 264 ISD::MemIndexedMode &AM,
|
| D | HexagonISelDAGToDAG.cpp | 451 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
560 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
|
| D | HexagonISelLowering.cpp | 600 SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 1135 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1146 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1187 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1193 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 454 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
|
| D | SelectionDAG.cpp | 6797 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
6822 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
6909 ISD::MemIndexedMode AM) { in getIndexedLoad()
7042 ISD::MemIndexedMode AM) { in getIndexedStore()
7072 ISD::MemIndexedMode AM, in getMaskedLoad()
7104 ISD::MemIndexedMode AM) { in getIndexedMaskedLoad()
7117 ISD::MemIndexedMode AM, bool IsTruncating, in getMaskedStore()
7152 ISD::MemIndexedMode AM) { in getIndexedMaskedStore()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 705 ISD::MemIndexedMode &AM,
|