Home
last modified time | relevance | path

Searched refs:NUM_BANKS (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/chip/gfx9/
Dgfx9_gb_reg.h53 unsigned int NUM_BANKS : 3; member
73 unsigned int NUM_BANKS : 3;
/third_party/node/deps/brotli/c/enc/
Dhash_forgetful_chain_inc.h48 uint16_t free_slot_idx[NUM_BANKS]; /* Up to 1KiB. Move to dynamic? */
126 sizeof(uint8_t) * 65536 + sizeof(FN(Bank)) * NUM_BANKS; in FN()
138 const size_t bank = key & (NUM_BANKS - 1); in FN()
243 const size_t bank = key & (NUM_BANKS - 1); in FN()
Dhash.h288 #define NUM_BANKS 1 macro
300 #undef NUM_BANKS
304 #define NUM_BANKS 512 macro
310 #undef NUM_BANKS
/third_party/skia/third_party/externals/brotli/c/enc/
Dhash_forgetful_chain_inc.h48 uint16_t free_slot_idx[NUM_BANKS]; /* Up to 1KiB. Move to dynamic? */
126 sizeof(uint8_t) * 65536 + sizeof(FN(Bank)) * NUM_BANKS; in FN()
138 const size_t bank = key & (NUM_BANKS - 1); in FN()
243 const size_t bank = key & (NUM_BANKS - 1); in FN()
Dhash.h288 #define NUM_BANKS 1 macro
300 #undef NUM_BANKS
304 #define NUM_BANKS 512 macro
310 #undef NUM_BANKS
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNRegBankReassign.cpp60 #define NUM_BANKS (NUM_VGPR_BANKS + NUM_SGPR_BANKS) macro
255 for (unsigned L = 0; L < NUM_BANKS; ++L) in dumpFreeBanks()
645 for (int Bank = 0; Bank < NUM_BANKS; ++Bank) { in tryReassign()
/third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_bo.c917 tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(md->u.legacy.num_banks) - 1); in radv_amdgpu_winsys_bo_set_metadata()
963 md->u.legacy.num_banks = 2 << AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in radv_amdgpu_winsys_bo_get_metadata()
/third_party/mesa3d/src/amd/common/
Dac_surface.c2642 surf->u.legacy.num_banks = 2 << AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in ac_surface_set_bo_metadata()
2697 *tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(surf->u.legacy.num_banks) - 1); in ac_surface_get_bo_metadata()
/third_party/mesa3d/src/amd/addrlib/src/gfx9/
Dgfx9addrlib.cpp1228 switch (gbAddrConfig.bits.NUM_BANKS) in HwlInitGlobalParams()