/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedA57WriteRes.td | 58 let NumMicroOps = 2; 64 let NumMicroOps = 2; 69 let NumMicroOps = 2; 74 let NumMicroOps = 2; 78 let NumMicroOps = 2; 82 let NumMicroOps = 2; 86 let NumMicroOps = 2; 90 let NumMicroOps = 2; 94 let NumMicroOps = 2; 99 let NumMicroOps = 2; [all …]
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D | AArch64SchedKryoDetails.td | 16 let Latency = 3; let NumMicroOps = 2; 23 let Latency = 3; let NumMicroOps = 2; 30 let Latency = 4; let NumMicroOps = 3; 36 let Latency = 4; let NumMicroOps = 4; 42 let Latency = 3; let NumMicroOps = 4; 48 let Latency = 3; let NumMicroOps = 2; 54 let Latency = 3; let NumMicroOps = 2; 60 let Latency = 3; let NumMicroOps = 2; 66 let Latency = 3; let NumMicroOps = 2; 72 let Latency = 3; let NumMicroOps = 2; [all …]
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D | AArch64SchedFalkorDetails.td | 36 let NumMicroOps = 0; 40 let NumMicroOps = 0; 44 let NumMicroOps = 0; 48 let NumMicroOps = 0; 94 let NumMicroOps = 2; 98 let NumMicroOps = 2; 102 let NumMicroOps = 2; 106 let NumMicroOps = 2; 110 let NumMicroOps = 2; 114 let NumMicroOps = 2; [all …]
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D | AArch64SchedExynosM5.td | 135 let NumMicroOps = 0; } 137 let NumMicroOps = 0; } 148 let NumMicroOps = 2; } 152 let NumMicroOps = 3; } 155 let NumMicroOps = 2; } 157 let NumMicroOps = 2; } 159 let NumMicroOps = 2; } 208 let NumMicroOps = 1; } 211 let NumMicroOps = 2; } 215 let NumMicroOps = 2; } [all …]
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D | AArch64SchedExynosM3.td | 109 let NumMicroOps = 1; } 111 let NumMicroOps = 0; } 118 let NumMicroOps = 2; } 122 let NumMicroOps = 3; } 125 let NumMicroOps = 2; } 152 let NumMicroOps = 1; } 155 let NumMicroOps = 2; } 159 let NumMicroOps = 2; } 162 let NumMicroOps = 2; } 165 let NumMicroOps = 2; } [all …]
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D | AArch64SchedExynosM4.td | 135 let NumMicroOps = 0; } 137 let NumMicroOps = 0; } 145 let NumMicroOps = 2; } 149 let NumMicroOps = 3; } 152 let NumMicroOps = 2; } 154 let NumMicroOps = 2; } 189 let NumMicroOps = 1; } 192 let NumMicroOps = 2; } 196 let NumMicroOps = 2; } 199 let NumMicroOps = 2; } [all …]
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D | AArch64SchedThunderX2T99.td | 96 let NumMicroOps = 2; 102 let NumMicroOps = 2; 108 let NumMicroOps = 2; 115 let NumMicroOps = 4; 122 let NumMicroOps = 4; 128 let NumMicroOps = 2; 134 let NumMicroOps = 2; 140 let NumMicroOps = 3; 146 let NumMicroOps = 3; 152 let NumMicroOps = 2; [all …]
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D | AArch64SchedKryo.td | 67 { let Latency = 2; let NumMicroOps = 2; } 69 { let Latency = 2; let NumMicroOps = 2; } 71 { let Latency = 2; let NumMicroOps = 2; } 74 { let Latency = 8; let NumMicroOps = 1; } // Fragent -1 76 { let Latency = 8; let NumMicroOps = 1; } // Fragent -1 88 { let Latency = 3; let NumMicroOps = 2; } 94 { let Latency = 6; let NumMicroOps = 2; } 96 { let Latency = 12; let NumMicroOps = 2; } // Fragent -1 / NoRSV +1
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMScheduleA57WriteRes.td | 88 let NumMicroOps = 2; 94 let NumMicroOps = 2; 99 let NumMicroOps = 2; 104 let NumMicroOps = 2; 109 let NumMicroOps = 2; 114 let NumMicroOps = 2; 118 let NumMicroOps = 2; 122 let NumMicroOps = 2; 126 let NumMicroOps = 2; 130 let NumMicroOps = 2; [all …]
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D | ARMScheduleR52.td | 84 def : WriteRes<WriteNoop, []> { let Latency = 0; let NumMicroOps = 0; } 145 let Latency = 4; let NumMicroOps = 0; 352 let NumMicroOps = 0; 454 let NumMicroOps = 2; 554 let NumMicroOps = Num; 641 let NumMicroOps = 2; 646 let NumMicroOps = 4; 651 let NumMicroOps = 6; 656 let NumMicroOps = 8; 661 let NumMicroOps = 10; [all …]
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D | ARMScheduleSwift.td | 86 let NumMicroOps = 2; 90 let NumMicroOps = 3; 263 let NumMicroOps = 3; 268 let NumMicroOps = 0; 272 let NumMicroOps = 0; 276 let NumMicroOps = 0; 285 let NumMicroOps = 5; 314 let NumMicroOps = 1; 327 let NumMicroOps = 2; 331 let NumMicroOps = 2; [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86SchedHaswell.td | 104 let NumMicroOps = UOps; 112 let NumMicroOps = !add(UOps, 1); 172 let NumMicroOps = 3; 464 let NumMicroOps = 2; 469 let NumMicroOps = 2; 475 let NumMicroOps = 2; 479 let NumMicroOps = 3; 487 let NumMicroOps = 3; 492 let NumMicroOps = 4; 499 let NumMicroOps = 9; [all …]
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D | X86SchedSkylakeClient.td | 98 let NumMicroOps = UOps; 106 let NumMicroOps = !add(UOps, 1); 165 let NumMicroOps = 3; 413 let NumMicroOps = 2; 418 let NumMicroOps = 2; 424 let NumMicroOps = 2; 428 let NumMicroOps = 3; 478 let NumMicroOps = 3; 483 let NumMicroOps = 4; 490 let NumMicroOps = 9; [all …]
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D | X86SchedBroadwell.td | 99 let NumMicroOps = UOps; 107 let NumMicroOps = !add(UOps, 1); 168 let NumMicroOps = 3; 423 let NumMicroOps = 2; 428 let NumMicroOps = 2; 433 let NumMicroOps = 2; 437 let NumMicroOps = 3; 487 let NumMicroOps = 3; 492 let NumMicroOps = 4; 499 let NumMicroOps = 9; [all …]
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D | X86SchedSkylakeServer.td | 98 let NumMicroOps = UOps; 106 let NumMicroOps = !add(UOps, 1); 166 let NumMicroOps = 3; 414 let NumMicroOps = 2; 419 let NumMicroOps = 2; 425 let NumMicroOps = 2; 429 let NumMicroOps = 3; 479 let NumMicroOps = 3; 484 let NumMicroOps = 4; 491 let NumMicroOps = 9; [all …]
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D | X86SchedSandyBridge.td | 94 let NumMicroOps = UOps; 102 let NumMicroOps = !add(UOps, 1); 167 let NumMicroOps = 3; 434 let NumMicroOps = 2; 438 let NumMicroOps = 2; 443 let NumMicroOps = 2; 447 let NumMicroOps = 3; 469 let NumMicroOps = 3; 474 let NumMicroOps = 4; 491 let NumMicroOps = 3; [all …]
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D | X86ScheduleBdVer2.td | 196 let NumMicroOps = UOps; 276 def : WriteRes<WriteSTMXCSR, [PdStore]> { let NumMicroOps = 2; let ResourceCycles = [18]; } 311 let NumMicroOps = 45; 329 let NumMicroOps = 1; 336 let NumMicroOps = 4; 343 let NumMicroOps = 2; 355 let NumMicroOps = 2; 380 let NumMicroOps = 3; 387 let NumMicroOps = 5; 394 let NumMicroOps = 6; [all …]
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D | X86ScheduleZnver2.td | 139 let NumMicroOps = UOps; 147 let NumMicroOps = !add(UOps, LoadUOps); 160 let NumMicroOps = UOps; 168 let NumMicroOps = !add(UOps, LoadUOps); 440 let NumMicroOps = 2; 450 let NumMicroOps = 2; 517 let NumMicroOps = 2; 525 let NumMicroOps = 2; 535 let NumMicroOps = 2; 628 let NumMicroOps = 2; [all …]
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D | X86ScheduleZnver1.td | 140 let NumMicroOps = UOps; 148 let NumMicroOps = !add(UOps, LoadUOps); 161 let NumMicroOps = UOps; 169 let NumMicroOps = !add(UOps, LoadUOps); 458 let NumMicroOps = 2; 468 let NumMicroOps = 2; 536 let NumMicroOps = 2; 546 let NumMicroOps = 2; 639 let NumMicroOps = 2; 650 let NumMicroOps = 2; [all …]
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D | X86ScheduleBtVer2.td | 129 let NumMicroOps = UOps; 137 let NumMicroOps = !add(UOps, LoadUOps); 149 let NumMicroOps = UOps; 157 let NumMicroOps = !add(UOps, LoadUOps); 169 let NumMicroOps = UOps; 177 let NumMicroOps = !add(UOps, LoadUOps); 313 let NumMicroOps = 3; 319 let NumMicroOps = 5; 325 let NumMicroOps = 6; 331 let NumMicroOps = 5; [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/ |
D | DispatchStage.cpp | 63 const unsigned NumMicroOps = IR.getInstruction()->getNumMicroOps(); in checkRCU() local 64 if (RCU.isAvailable(NumMicroOps)) in checkRCU() 82 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch() local 83 if (NumMicroOps > DispatchWidth) { in dispatch() 86 CarryOver = NumMicroOps - DispatchWidth; in dispatch() 89 assert(AvailableEntries >= NumMicroOps); in dispatch() 90 AvailableEntries -= NumMicroOps; in dispatch() 134 std::min(DispatchWidth, NumMicroOps)); in dispatch() 160 unsigned NumMicroOps = Inst.getNumMicroOps(); in isAvailable() local 162 unsigned Required = std::min(NumMicroOps, DispatchWidth); in isAvailable()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZHazardRecognizer.cpp | 51 assert((SC->NumMicroOps != 2 || (SC->BeginGroup && !SC->EndGroup)) && in getNumDecoderSlots() 53 assert((SC->NumMicroOps < 3 || (SC->BeginGroup && SC->EndGroup)) && in getNumDecoderSlots() 55 assert((SC->NumMicroOps < 3 || (SC->NumMicroOps % 3 == 0)) && in getNumDecoderSlots() 58 return SC->NumMicroOps; in getNumDecoderSlots() 194 if (SC->NumMicroOps > 1) in dumpSU() 195 OS << "/" << SC->NumMicroOps << "uops"; in dumpSU()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCScheduleP9.td | 138 let NumMicroOps = 0; 145 let NumMicroOps = 0; 152 let NumMicroOps = 0; 158 let NumMicroOps = 0; 163 let NumMicroOps = 0; 169 let NumMicroOps = 0; 174 let NumMicroOps = 0; 179 let NumMicroOps = 0; 184 let NumMicroOps = 0;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCSchedule.h | 117 uint16_t NumMicroOps : 14; member 128 return NumMicroOps != InvalidNumMicroOps; in isValid() 131 return NumMicroOps == VariantNumMicroOps; in isVariant()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
D | Support.cpp | 83 unsigned NumMicroOps, in computeBlockRThroughput() argument 88 double Max = static_cast<double>(NumMicroOps) / DispatchWidth; in computeBlockRThroughput()
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