Searched refs:NumRegClasses (Results 1 – 7 of 7) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterBank.inc | 117 …me */ "CC", /* Size */ 32, /* CoveredRegClasses */ CCRegBankCoverageData, /* NumRegClasses */ 108);
118 …*/ "FPR", /* Size */ 512, /* CoveredRegClasses */ FPRRegBankCoverageData, /* NumRegClasses */ 108);
119 … */ "GPR", /* Size */ 64, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 108);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBank.cpp | 25 const uint32_t *CoveredClasses, unsigned NumRegClasses) in RegisterBank() argument
27 ContainedRegClasses.resize(NumRegClasses); in RegisterBank()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 1048 const unsigned NumRegClasses; variable
1071 if (Base >= NumRegClasses) { in moveToNextID()
1072 ID = NumRegClasses; in moveToNextID()
1111 : NumRegClasses(TRI.getNumRegClasses()), Mask(Mask), CurrentChunk(*Mask) { in BitMaskClassIterator()
1117 bool isValid() const { return getID() != NumRegClasses; } in isValid()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenRegisterBank.inc | 83 …/ "FPRB", /* Size */ 128, /* CoveredRegClasses */ FPRBRegBankCoverageData, /* NumRegClasses */ 70);
84 …*/ "GPRB", /* Size */ 32, /* CoveredRegClasses */ GPRBRegBankCoverageData, /* NumRegClasses */ 70);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterBank.inc | 94 …/ "FPRB", /* Size */ 128, /* CoveredRegClasses */ FPRRegBankCoverageData, /* NumRegClasses */ 122);
95 …*/ "GPRB", /* Size */ 32, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 122);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterBank.inc | 137 … */ "GPR", /* Size */ 64, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 118);
138 … "VECR", /* Size */ 512, /* CoveredRegClasses */ VECRRegBankCoverageData, /* NumRegClasses */ 118);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBank.h | 44 const uint32_t *CoveredClasses, unsigned NumRegClasses);
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