/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CollectLOH.cpp | 337 LOHInfo &OpInfo) { in handleMiddleInst() argument 338 if (!DefInfo.IsCandidate || (&DefInfo != &OpInfo && OpInfo.OneUser)) in handleMiddleInst() 341 if (&DefInfo != &OpInfo) { in handleMiddleInst() 342 OpInfo = DefInfo; in handleMiddleInst() 349 assert(OpInfo.IsCandidate && "Expect valid state"); in handleMiddleInst() 351 if (OpInfo.Type == MCLOH_AdrpLdr) { in handleMiddleInst() 352 OpInfo.Type = MCLOH_AdrpAddLdr; in handleMiddleInst() 353 OpInfo.IsCandidate = true; in handleMiddleInst() 354 OpInfo.MI1 = &MI; in handleMiddleInst() 356 } else if (OpInfo.Type == MCLOH_AdrpAddStr && OpInfo.MI1 == nullptr) { in handleMiddleInst() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MicroMipsSizeReduction.cpp | 65 struct OpInfo { struct 66 OpInfo(enum OperandTransfer TransferOperands) in OpInfo() argument 68 OpInfo() : TransferOperands(OT_NA) {} in OpInfo() argument 93 struct OpInfo OpInf; ///< Characteristics of operands 97 bool (*F)(ReduceEntryFunArgs *Arguments), struct OpInfo OpInf, in ReduceEntry() 215 ReduceADDIUToADDIUR1SP, OpInfo(OT_Operands02), ImmField(2, 0, 64, 2)}, 217 OpInfo(OT_Operand2), ImmField(0, 0, 0, 2)}, 219 ReduceADDIUToADDIUR1SP, OpInfo(OT_Operands02), ImmField(2, 0, 64, 2)}, 221 ReduceADDIUToADDIUSP, OpInfo(OT_Operand2), ImmField(0, 0, 0, 2)}, 223 ReduceArithmeticInstructions, OpInfo(OT_OperandsAll), [all …]
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/third_party/mesa3d/src/nouveau/codegen/ |
D | nv50_ir_target.h | 193 struct OpInfo struct 195 OpInfo *variants; argument 215 inline const OpInfo& getOpInfo(const Instruction *) const; argument 216 inline const OpInfo& getOpInfo(const operation) const; 268 OpInfo opInfo[OP_LAST + 1]; 271 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const in getOpInfo() 276 const Target::OpInfo& Target::getOpInfo(const operation op) const in getOpInfo()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.h | 704 const MCOperandInfo &OpInfo) const { in isInlineConstant() argument 705 return isInlineConstant(MO, OpInfo.OperandType); in isInlineConstant() 715 if (!MI.getDesc().OpInfo || OpIdx >= MI.getDesc().NumOperands) { in isInlineConstant() 719 return isInlineConstant(DefMO, MI.getDesc().OpInfo[OpIdx]); in isInlineConstant() 726 return isInlineConstant(MO, MI.getDesc().OpInfo[OpIdx].OperandType); in isInlineConstant() 731 if (!MI.getDesc().OpInfo || OpIdx >= MI.getDesc().NumOperands) in isInlineConstant() 743 return isInlineConstant(MO, MI.getDesc().OpInfo[OpIdx].OperandType); in isInlineConstant() 752 const MCOperandInfo &OpInfo) const { in isLiteralConstant() argument 753 return MO.isImm() && !isInlineConstant(MO, OpInfo.OperandType); in isLiteralConstant() 766 const MCOperandInfo &OpInfo) const; [all …]
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D | SIFoldOperands.cpp | 160 return TII->isInlineConstant(OpToFold, MadDesc.OpInfo[OpNo].OperandType); in isInlineConstantIfFolded() 216 switch (TII.get(Opcode).OpInfo[OpNo].OperandType) { in updateOperand() 435 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; in tryAddToFoldList() local 440 if (!SRI.opCanUseInlineConstant(OpInfo.OperandType) || in tryAddToFoldList() 441 !TII->isInlineConstant(*OpToFold, OpInfo)) { in tryAddToFoldList() 446 TII->isLiteralConstantLike(Op, OpInfo)) { in tryAddToFoldList() 509 const MCOperandInfo *OpInfo = Desc.OpInfo; in tryToFoldACImm() local 510 if (!OpInfo || UseOpIdx >= Desc.getNumOperands()) in tryToFoldACImm() 513 uint8_t OpTy = OpInfo[UseOpIdx].OperandType; in tryToFoldACImm() 848 UseDesc.OpInfo[UseOpIdx].RegClass == -1) in foldOperand() [all …]
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D | SIInstrInfo.cpp | 2901 const MCOperandInfo &OpInfo) const { in isLiteralConstantLike() 2906 return !isInlineConstant(MO, OpInfo); in isLiteralConstantLike() 2936 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; in isImmOperandLegal() local 2940 if (OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE) in isImmOperandLegal() 2943 if (OpInfo.RegClass < 0) in isImmOperandLegal() 2949 if (MO.isImm() && isInlineConstant(MO, OpInfo)) { in isImmOperandLegal() 2954 return RI.opCanUseInlineConstant(OpInfo.OperandType); in isImmOperandLegal() 2957 if (!RI.opCanUseLiteralConstant(OpInfo.OperandType)) in isImmOperandLegal() 3110 const MCOperandInfo &OpInfo) const { in usesConstantBus() 3115 return !isInlineConstant(MO, OpInfo); in usesConstantBus() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 199 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands variable 215 (OpInfo[OpNum].Constraints & (1 << Constraint))) { in getOperandConstraint() 217 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; in getOperandConstraint() 239 const_opInfo_iterator opInfo_begin() const { return OpInfo; } in opInfo_begin() 240 const_opInfo_iterator opInfo_end() const { return OpInfo + NumOperands; } in opInfo_end() 631 if (OpInfo[i].isPredicate()) in findFirstPredOperandIdx()
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/third_party/skia/src/gpu/ |
D | GrAuditTrail.h | 108 struct OpInfo { struct 119 void getBoundsByClientID(SkTArray<OpInfo>* outInfo, int clientID); argument 120 void getBoundsByOpsTaskID(OpInfo* outInfo, int opsTaskID); 151 void copyOutFromOpsTask(OpInfo* outOpInfo, int opsTask);
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D | GrAuditTrail.cpp | 87 void GrAuditTrail::copyOutFromOpsTask(OpInfo* outOpInfo, int opsTaskID) { in copyOutFromOpsTask() 94 OpInfo::Op& outOp = outOpInfo->fOps.push_back(); in copyOutFromOpsTask() 101 void GrAuditTrail::getBoundsByClientID(SkTArray<OpInfo>* outInfo, int clientID) { in getBoundsByClientID() 114 OpInfo& outOpInfo = outInfo->push_back(); in getBoundsByClientID() 124 void GrAuditTrail::getBoundsByOpsTaskID(OpInfo* outInfo, int opsTaskID) { in getBoundsByOpsTaskID()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerInfo.cpp | 482 const MCOperandInfo *OpInfo = MI.getDesc().OpInfo; in getAction() local 485 if (!OpInfo[i].isGenericType()) in getAction() 490 unsigned TypeIdx = OpInfo[i].getGenericTypeIndex(); in getAction() 702 [](unsigned Acc, const MCOperandInfo &OpInfo) { in verify() argument 703 return OpInfo.isGenericType() in verify() 704 ? std::max(OpInfo.getGenericTypeIndex() + 1U, Acc) in verify() 709 [](unsigned Acc, const MCOperandInfo &OpInfo) { in verify() argument 710 return OpInfo.isGenericImm() in verify() 711 ? std::max(OpInfo.getGenericImmIndex() + 1U, Acc) in verify()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 7868 static void patchMatchingInput(const SDISelAsmOperandInfo &OpInfo, in patchMatchingInput() argument 7871 if (OpInfo.ConstraintVT == MatchingOpInfo.ConstraintVT) in patchMatchingInput() 7878 TLI.getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode, in patchMatchingInput() 7879 OpInfo.ConstraintVT); in patchMatchingInput() 7883 if ((OpInfo.ConstraintVT.isInteger() != in patchMatchingInput() 7891 MatchingOpInfo.ConstraintVT = OpInfo.ConstraintVT; in patchMatchingInput() 7898 SDISelAsmOperandInfo &OpInfo, in getAddressForMemoryInput() argument 7911 const Value *OpVal = OpInfo.CallOperandVal; in getAddressForMemoryInput() 7914 OpInfo.CallOperand = DAG.getConstantPool( in getAddressForMemoryInput() 7927 Chain = DAG.getTruncStore(Chain, Location, OpInfo.CallOperand, StackSlot, in getAddressForMemoryInput() [all …]
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D | TargetLowering.cpp | 4096 SDValue &Chain, SDValue &Flag, SDLoc DL, const AsmOperandInfo &OpInfo, in LowerAsmOutputForConstraint() argument 4261 AsmOperandInfo &OpInfo = ConstraintOperands.back(); in ParseConstraints() local 4264 if (OpInfo.multipleAlternatives.size() > maCount) in ParseConstraints() 4265 maCount = OpInfo.multipleAlternatives.size(); in ParseConstraints() 4267 OpInfo.ConstraintVT = MVT::Other; in ParseConstraints() 4270 switch (OpInfo.Type) { in ParseConstraints() 4273 if (OpInfo.isIndirect) { in ParseConstraints() 4274 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); in ParseConstraints() 4283 OpInfo.ConstraintVT = in ParseConstraints() 4287 OpInfo.ConstraintVT = getSimpleValueType(DL, CS.getType()); in ParseConstraints() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 48 uint32_t getLitEncoding(const MCOperand &MO, const MCOperandInfo &OpInfo, 217 const MCOperandInfo &OpInfo, in getLitEncoding() argument 236 switch (OpInfo.OperandType) { in getLitEncoding() 323 if (getLitEncoding(Op, Desc.OpInfo[i], STI) != 255) in encodeInstruction() 382 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI); in getSDWASrcEncoding() 492 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI); in getMachineOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
D | WebAssemblyMCCodeEmitter.cpp | 91 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction() 129 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction() 142 const MCOperandInfo &Info = Desc.OpInfo[I]; in encodeInstruction()
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D | WebAssemblyInstPrinter.cpp | 159 if (Desc.OpInfo[I].OperandType != WebAssembly::OPERAND_BASIC_BLOCK) in printInst() 229 const MCOperandInfo &Info = Desc.OpInfo[OpNo]; in printOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Bitstream/ |
D | BitCodes.h | 183 void Add(const BitCodeAbbrevOp &OpInfo) { in Add() argument 184 OperandList.push_back(OpInfo); in Add()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/pnacl-llvm/include/llvm/Bitcode/NaCl/ |
D | NaClBitCodes.h | 291 void Add(const NaClBitCodeAbbrevOp &OpInfo) { OperandList.push_back(OpInfo); }
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
D | MCInstrAnalysis.cpp | 29 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | Thumb2SizeReduction.cpp | 831 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr() 833 if (SkipPred && MCID.OpInfo[i].isPredicate()) in ReduceTo2Addr() 867 if (MCID.OpInfo[i].isPredicate()) in ReduceToNarrow() 877 !MCID.OpInfo[i].isPredicate()) { in ReduceToNarrow() 938 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow() 948 bool isPred = (i < NumOps && MCID.OpInfo[i].isPredicate()); in ReduceToNarrow()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
D | AMDGPUBaseInfo.h | 596 inline unsigned getOperandSize(const MCOperandInfo &OpInfo) { in getOperandSize() argument 597 switch (OpInfo.OperandType) { in getOperandSize() 633 return getOperandSize(Desc.OpInfo[OpNo]); in getOperandSize()
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/third_party/node/deps/v8/src/diagnostics/ |
D | unwinding-info-win64.cc | 107 unsigned char OpInfo : 4; member 141 unwind_codes[0].OpInfo = 0; in V8UnwindData() 145 unwind_codes[1].OpInfo = rbp.code(); in V8UnwindData()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblySetP2AlignOperands.cpp | 65 assert(MI.getDesc().OpInfo[OperandNo].OperandType == in rewriteP2Align()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCTargetDesc.cpp | 269 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch() 299 if (Info->get(Inst.getOpcode()).OpInfo[OpId].OperandType != in evaluateBranch()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
D | TargetTransformInfo.cpp | 547 OperandValueKind OpInfo = OK_AnyValue; in getOperandInfo() local 561 OpInfo = OK_UniformValue; in getOperandInfo() 568 OpInfo = OK_NonUniformConstantValue; in getOperandInfo() 570 OpInfo = OK_UniformConstantValue; in getOperandInfo() 589 OpInfo = OK_UniformValue; in getOperandInfo() 591 return OpInfo; in getOperandInfo()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
D | LanaiMCTargetDesc.cpp | 101 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType == in evaluateBranch()
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