| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrFMA3Info.h | 30 uint16_t Opcodes[3]; member
60 return Opcodes[Form132]; in get132Opcode()
65 return Opcodes[Form213]; in get213Opcode()
70 return Opcodes[Form231]; in get231Opcode()
90 return Opcodes[0] < RHS.Opcodes[0];
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| D | X86InstrFMA3Info.cpp | 162 return Group.Opcodes[FormIndex] < Opcode; in getFMA3Group()
164 assert(I != Table.end() && I->Opcodes[FormIndex] == Opcode && in getFMA3Group()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 128 } const Opcodes; member in __anonb6c6e90f0111::ARMInstructionSelector
177 TRI(*STI.getRegisterInfo()), TM(TM), RBI(RBI), STI(STI), Opcodes(STI), in ARMInstructionSelector()
349 return Size == 8 ? Opcodes.SEXT8 : Opcodes.SEXT16; in selectSimpleExtOpc()
352 return Size == 8 ? Opcodes.ZEXT8 : Opcodes.ZEXT16; in selectSimpleExtOpc()
366 return isStore ? Opcodes.STORE8 : Opcodes.LOAD8; in selectLoadStoreOpCode()
368 return isStore ? Opcodes.STORE16 : Opcodes.LOAD16; in selectLoadStoreOpCode()
370 return isStore ? Opcodes.STORE32 : Opcodes.LOAD32; in selectLoadStoreOpCode()
496 (void)BuildMI(I.MBB, I.InsertBefore, I.DbgLoc, TII.get(Opcodes.MOVi)) in putConstant()
676 : Opcodes.MOV_ga_pcrel) in selectGlobal()
678 : Opcodes.LDRLIT_ga_pcrel); in selectGlobal()
[all …]
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| D | ARMISelDAGToDAG.cpp | 230 void SelectMVE_WB(SDNode *N, const uint16_t *Opcodes, bool Predicated);
267 const uint16_t *const *Opcodes);
2456 void ARMDAGToDAGISel::SelectMVE_WB(SDNode *N, const uint16_t *Opcodes, in SelectMVE_WB() argument
2464 Opcode = Opcodes[0]; in SelectMVE_WB()
2467 Opcode = Opcodes[1]; in SelectMVE_WB()
2589 const uint16_t *Opcodes = IsUnsigned ? OpcodesU : OpcodesS; in SelectBaseMVE_VMLLDAV() local
2591 Opcodes += 4 * Stride; in SelectBaseMVE_VMLLDAV()
2593 Opcodes += 2 * Stride; in SelectBaseMVE_VMLLDAV()
2595 Opcodes += Stride; in SelectBaseMVE_VMLLDAV()
2596 uint16_t Opcode = Opcodes[TySize]; in SelectBaseMVE_VMLLDAV()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Object/ |
| D | MachOObjectFile.cpp | 3108 : E(E), O(O), Opcodes(Bytes), Ptr(Bytes.begin()), in MachORebaseEntry()
3112 Ptr = Opcodes.begin(); in moveToFirst()
3117 Ptr = Opcodes.end(); in moveToEnd()
3133 if (Ptr == Opcodes.end()) { in moveNext()
3158 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3173 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3182 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3198 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3207 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
3222 Twine::utohexstr(OpcodeStart - Opcodes.begin())); in moveNext()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMELFStreamer.cpp | 88 const SmallVectorImpl<uint8_t> &Opcodes) override;
262 const SmallVectorImpl<uint8_t> &Opcodes) { in emitUnwindRaw() argument
264 for (SmallVectorImpl<uint8_t>::const_iterator OCI = Opcodes.begin(), in emitUnwindRaw()
265 OCE = Opcodes.end(); in emitUnwindRaw()
400 const SmallVectorImpl<uint8_t> &Opcodes) override;
468 void emitUnwindRaw(int64_t Offset, const SmallVectorImpl<uint8_t> &Opcodes);
710 SmallVector<uint8_t, 64> Opcodes; member in __anon65e2e86b0111::ARMELFStreamer
755 const SmallVectorImpl<uint8_t> &Opcodes) { in emitUnwindRaw() argument
756 getStreamer().emitUnwindRaw(Offset, Opcodes); in emitUnwindRaw()
1254 Opcodes.clear(); in EHReset()
[all …]
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| D | ARMUnwindOpAsm.h | 62 void EmitRaw(const SmallVectorImpl<uint8_t> &Opcodes) { in EmitRaw() argument
63 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); in EmitRaw()
64 OpBegins.push_back(OpBegins.back() + Opcodes.size()); in EmitRaw()
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| D | ARMTargetStreamer.cpp | 101 const SmallVectorImpl<uint8_t> &Opcodes) { in emitUnwindRaw() argument
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| /third_party/elfutils/tests/ |
| D | run-readelf-multi-noline.sh | 51 Opcodes:
87 Opcodes:
123 Opcodes:
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| D | run-readelf-line.sh | 43 Opcodes:
100 Opcodes:
152 Opcodes:
301 Opcodes:
575 Opcodes:
734 Opcodes:
868 Opcodes:
1030 Opcodes:
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| D | run-nvidia-extended-linemap-readelf.sh | 44 Opcodes:
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| D | run-readelf-zdebug.sh | 376 Opcodes:
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerInfo.cpp | 435 std::initializer_list<unsigned> Opcodes) { in getActionDefinitionsBuilder() argument
436 unsigned Representative = *Opcodes.begin(); in getActionDefinitionsBuilder()
438 assert(!llvm::empty(Opcodes) && Opcodes.begin() + 1 != Opcodes.end() && in getActionDefinitionsBuilder()
441 for (auto I = Opcodes.begin() + 1, E = Opcodes.end(); I != E; ++I) in getActionDefinitionsBuilder()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetInstrPredicate.td | 160 // Check that the instruction opcode is one of the opcodes in set `Opcodes`.
164 class CheckOpcode<list<Instruction> Opcodes> : MCInstPredicate {
165 list<Instruction> ValidOpcodes = Opcodes;
169 // `Opcodes`. This check is always expanded to "false" if we are generating
171 class CheckPseudo<list<Instruction> Opcodes> : CheckOpcode<Opcodes>;
210 list<Instruction> Opcodes = opcodes;
278 list<Instruction> Opcodes = opcodes;
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| /third_party/skia/third_party/externals/angle2/third_party/bazel/desugar/ |
| D | stateful-lambdas.patch | 6 checkArgument(BitFlags.noneSet(access, Opcodes.ACC_INTERFACE), "Not a class: %s", name);
20 access &= ~Opcodes.ACC_PRIVATE; // make constructor accessible if we'll call it directly
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Object/ |
| D | MachO.h | 192 ArrayRef<uint8_t> Opcodes; variable
216 ArrayRef<uint8_t> Opcodes, bool is64Bit, MachOBindEntry::Kind);
244 ArrayRef<uint8_t> Opcodes; variable
394 ArrayRef<uint8_t> Opcodes,
409 ArrayRef<uint8_t> Opcodes,
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| /third_party/skia/third_party/externals/spirv-tools/utils/vscode/src/schema/ |
| D | schema.go.tmpl | 104 // Opcodes is a map of opcode name to Opcode description.
105 Opcodes = OpcodeMap {•{{range $i := .SPIRV.Instructions}}
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| /third_party/spirv-tools/utils/vscode/src/schema/ |
| D | schema.go.tmpl | 104 // Opcodes is a map of opcode name to Opcode description.
105 Opcodes = OpcodeMap {•{{range $i := .SPIRV.Instructions}}
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/utils/vscode/src/schema/ |
| D | schema.go.tmpl | 104 // Opcodes is a map of opcode name to Opcode description.
105 Opcodes = OpcodeMap {•{{range $i := .SPIRV.Instructions}}
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEFrameLowering.cpp | 246 std::pair<unsigned, unsigned> Opcodes = getMFHiLoOpc(Src); in expandCopy() local
248 if (!Opcodes.first) in expandCopy()
251 return expandCopyACC(MBB, I, Opcodes.first, Opcodes.second); in expandCopy()
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| /third_party/openGLES/xml/ |
| D | glxproto.reserved.txt | 14 GLX Opcodes (8 bits)
88 OpenGL Single Opcodes (8 Bits)
110 OpenGL Rendering Opcodes (16 Bits)
|
| /third_party/skia/third_party/externals/opengl-registry/xml/ |
| D | glxproto.reserved.txt | 14 GLX Opcodes (8 bits)
88 OpenGL Single Opcodes (8 Bits)
110 OpenGL Rendering Opcodes (16 Bits)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ObjectYAML/ |
| D | DWARFYAML.cpp | 163 IO.mapRequired("Opcodes", LineTable.Opcodes); in mapping()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ObjectYAML/ |
| D | DWARFYAML.h | 140 std::vector<LineTableOpcode> Opcodes; member
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| /third_party/elfutils/ |
| D | TODO | 57 *** Opcodes
|