Searched refs:OperandIdx (Results 1 – 9 of 9) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600Packetizer.cpp | 86 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector() local 87 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0) in getPreviousVector() 136 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Ops[i]); in substitutePV() local 137 if (OperandIdx < 0) in substitutePV() 139 Register Src = MI.getOperand(OperandIdx).getReg(); in substitutePV() 142 MI.getOperand(OperandIdx).setReg(It->second); in substitutePV()
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D | R600ISelLowering.cpp | 2213 int OperandIdx[] = { in PostISelFolding() local 2244 if (OperandIdx[i] < 0) in PostISelFolding() 2246 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding() 2250 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding() 2266 int OperandIdx[] = { in PostISelFolding() local 2282 if (OperandIdx[i] < 0) in PostISelFolding() 2284 SDValue &Src = Ops[OperandIdx[i] - 1]; in PostISelFolding() 2289 int SelIdx = TII->getSelIdx(Opcode, OperandIdx[i]); in PostISelFolding()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCInstrItineraries.h | 164 int getOperandCycle(unsigned ItinClassIndx, unsigned OperandIdx) const { in getOperandCycle() argument 170 if ((FirstIdx + OperandIdx) >= LastIdx) in getOperandCycle() 173 return (int)OperandCycles[FirstIdx + OperandIdx]; in getOperandCycle()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/ |
D | DWARFDebugFrame.cpp | 219 unsigned OperandIdx, uint64_t Operand) const { in printOperand() argument 220 assert(OperandIdx < 2); in printOperand() 222 OperandType Type = getOperandTypes()[Opcode][OperandIdx]; in printOperand() 226 OS << " Unsupported " << (OperandIdx ? "second" : "first") << " operand to"; in printOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
D | RewriteStatepointsForGC.cpp | 1095 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument 1096 Value *InVal = BdvIE->getOperand(OperandIdx); in findBasePointer() 1098 BaseIE->setOperand(OperandIdx, Base); in findBasePointer() 1105 auto UpdateOperand = [&](int OperandIdx) { in findBasePointer() argument 1106 Value *InVal = BdvSV->getOperand(OperandIdx); in findBasePointer() 1108 BaseSV->setOperand(OperandIdx, Base); in findBasePointer()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/ |
D | DWARFDebugFrame.h | 125 const Instruction &Instr, unsigned OperandIdx,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
D | AMDGPUAsmParser.cpp | 4831 unsigned OperandIdx[4]; in cvtExp() local 4841 OperandIdx[SrcIdx] = Inst.size(); in cvtExp() 4849 OperandIdx[SrcIdx] = Inst.size(); in cvtExp() 4872 Inst.getOperand(OperandIdx[1]) = Inst.getOperand(OperandIdx[2]); in cvtExp() 4873 Inst.getOperand(OperandIdx[2]).setReg(AMDGPU::NoRegister); in cvtExp() 4874 Inst.getOperand(OperandIdx[3]).setReg(AMDGPU::NoRegister); in cvtExp() 4878 if (Inst.getOperand(OperandIdx[i]).getReg() != AMDGPU::NoRegister) { in cvtExp()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/ |
D | RISCVAsmParser.cpp | 1460 unsigned OperandIdx = 1; in ParseInstruction() local 1469 ++OperandIdx; in ParseInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 6561 unsigned OperandIdx) { in canCauseUndefinedBehavior() argument 6564 if (OperandIdx != 1) in canCauseUndefinedBehavior()
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