Searched refs:PIPE_CONTROL_TILE_CACHE_FLUSH (Results 1 – 10 of 10) sorted by relevance
221 [IRIS_DOMAIN_RENDER_WRITE] = PIPE_CONTROL_TILE_CACHE_FLUSH, in iris_emit_buffer_barrier_for()222 [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_TILE_CACHE_FLUSH, in iris_emit_buffer_barrier_for()344 PIPE_CONTROL_TILE_CACHE_FLUSH | in iris_flush_all_caches()402 PIPE_CONTROL_TILE_CACHE_FLUSH; in iris_memory_barrier()
69 PIPE_CONTROL_TILE_CACHE_FLUSH | in iris_fine_fence_new()
260 PIPE_CONTROL_TILE_CACHE_FLUSH | in fast_clear_color()293 PIPE_CONTROL_TILE_CACHE_FLUSH | in fast_clear_color()487 PIPE_CONTROL_TILE_CACHE_FLUSH); in fast_clear_depth()
145 { .iris = PIPE_CONTROL_TILE_CACHE_FLUSH, .ds = INTEL_DS_TILE_CACHE_FLUSH_BIT, }, in iris_utrace_pipe_flush_bit_to_ds_stall_flag()
357 PIPE_CONTROL_TILE_CACHE_FLUSH = (1 << 25), enumerator366 PIPE_CONTROL_TILE_CACHE_FLUSH | \
368 PIPE_CONTROL_TILE_CACHE_FLUSH | in iris_cache_flush_for_render()
7627 if ((flags & PIPE_CONTROL_TILE_CACHE_FLUSH)) { in batch_mark_sync_for_pipe_control()8123 (flags & PIPE_CONTROL_TILE_CACHE_FLUSH) ? "Tile " : "", in iris_emit_raw_pipe_control()8156 pc.TileCacheFlushEnable = flags & PIPE_CONTROL_TILE_CACHE_FLUSH; in iris_emit_raw_pipe_control()
2034 PIPE_CONTROL_TILE_CACHE_FLUSH | in iris_map_copy_region()
75 PIPE_CONTROL_TILE_CACHE_FLUSH | in crocus_fine_fence_new()
259 PIPE_CONTROL_TILE_CACHE_FLUSH = (1 << 25), enumerator