Searched refs:PRE_INC (Results 1 – 16 of 16) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 987 PRE_INC, enumerator
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| D | BasicTTIImpl.h | 179 return ISD::PRE_INC; in getISDIndexedMode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGAddressAnalysis.cpp | 178 if (N->getAddressingMode() == ISD::PRE_INC) { in matchLSNode()
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| D | SelectionDAGDumper.cpp | 457 case ISD::PRE_INC: return "<pre-inc>"; in getIndexedModeName()
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| D | DAGCombiner.cpp | 13785 if (!getCombineLoadStoreParts(N, ISD::PRE_INC, ISD::PRE_DEC, IsLoad, IsMasked, in CombineToPreIndexedLoadStore()
14131 (AM == ISD::PRE_INC || AM == ISD::POST_INC ? ISD::ADD : ISD::SUB); in SplitIndexingFromLoad()
20820 Offset = (LSN->getAddressingMode() == ISD::PRE_INC) in isAlias()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 793 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
829 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
849 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
928 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
1332 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm8Offset()
1401 ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC)) in SelectT2AddrModeImm7Offset()
1529 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad()
1636 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryT2IndexedLoad()
1700 isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryMVEIndexedLoad()
1716 isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryMVEIndexedLoad()
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| D | ARMISelLowering.cpp | 304 for (unsigned im = (unsigned)ISD::PRE_INC; in addMVEVectorTypes()
332 for (unsigned im = (unsigned)ISD::PRE_INC; in addMVEVectorTypes()
395 for (unsigned im = (unsigned)ISD::PRE_INC; in addMVEVectorTypes()
1023 for (unsigned im = (unsigned)ISD::PRE_INC; in ARMTargetLowering()
15556 AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
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| D | ARMInstrMVE.td | 5965 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
6049 …return cast<MaskedStoreSDNode>(N)->isTruncatingStore() && (AM == ISD::PRE_INC || AM == ISD::PRE_DE…
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 173 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
174 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
175 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
176 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
177 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
178 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
179 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
180 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
181 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
182 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
[all …]
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| D | PPCISelDAGToDAG.cpp | 4629 ST->getAddressingMode() != ISD::PRE_INC) in Select()
4640 if (LD->getAddressingMode() != ISD::PRE_INC) { in Select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 1136 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
1147 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 625 for (unsigned IM = (unsigned)ISD::PRE_INC; in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 601 for (unsigned im = (unsigned)ISD::PRE_INC; in AArch64TargetLowering()
939 for (unsigned im = (unsigned)ISD::PRE_INC; in addTypeForNEON()
12768 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
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| D | AArch64ISelDAGToDAG.cpp | 1192 bool IsPre = AM == ISD::PRE_INC || AM == ISD::PRE_DEC; in tryIndexedLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 64794 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
65083 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
65133 …return cast<MaskedStoreSDNode>(N)->isTruncatingStore() && (AM == ISD::PRE_INC || AM == ISD::PRE_DE…
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenDAGISel.inc | 44807 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
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