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Searched refs:QueuePtr (Results 1 – 7 of 7) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUArgumentUsageInfo.cpp60 << " QueuePtr: " << FI.second.QueuePtr in print()
122 return std::make_pair(QueuePtr ? &QueuePtr : nullptr, in getPreloadedValue()
DSIMachineFunctionInfo.cpp33 QueuePtr(false), in SIMachineFunctionInfo()
136 QueuePtr = true; in SIMachineFunctionInfo()
204 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
207 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr()
455 Any |= convertArg(AI.QueuePtr, ArgInfo.QueuePtr); in convertArgumentInfo()
DSIMachineFunctionInfo.h189 Optional<SIArgument> QueuePtr;
213 YamlIO.mapOptional("queuePtr", AI.QueuePtr);
390 bool QueuePtr : 1;
600 return QueuePtr;
740 return ArgInfo.QueuePtr.getRegister();
DAMDGPUArgumentUsageInfo.h126 ArgDescriptor QueuePtr; member
DAMDGPUTargetMachine.cpp1107 parseAndCheckArgument(YamlMFI.ArgInfo->QueuePtr, AMDGPU::SReg_64RegClass, in parseMachineFunctionInfo()
1108 MFI->ArgInfo.QueuePtr, 2, 0) || in parseMachineFunctionInfo()
DAMDGPULegalizerInfo.cpp1221 Register QueuePtr = MRI.createGenericVirtualRegister( in getSegmentAperture() local
1225 if (!loadInputValue(QueuePtr, B, &MFI->getArgInfo().QueuePtr)) in getSegmentAperture()
1245 B.materializePtrAdd(LoadAddr, QueuePtr, LLT::scalar(64), StructOffset); in getSegmentAperture()
DSIISelLowering.cpp1743 ArgInfo.QueuePtr = allocateSGPR64Input(CCInfo); in allocateSpecialInputSGPRs()
4636 SDValue QueuePtr = CreateLiveInRegister( in lowerTRAP() local
4640 QueuePtr, SDValue()); in lowerTRAP()
4700 SDValue QueuePtr = CreateLiveInRegister( in getSegmentAperture() local
4707 SDValue Ptr = DAG.getObjectPtrOffset(DL, QueuePtr, StructOffset); in getSegmentAperture()
4713 return DAG.getLoad(MVT::i32, DL, QueuePtr.getValue(1), Ptr, PtrInfo, in getSegmentAperture()