Searched refs:RADEON_SURF_MODE_1D (Results 1 – 16 of 16) sorted by relevance
182 surflevel->mode = RADEON_SURF_MODE_1D; in surf_minify()350 surf->level[i].mode = RADEON_SURF_MODE_1D; in r6_surface_init_1d()392 if (surf->level[i].mode == RADEON_SURF_MODE_1D) { in r6_surface_init_2d()422 case RADEON_SURF_MODE_1D: in r6_surface_init()426 mode = RADEON_SURF_MODE_1D; in r6_surface_init()428 surf->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE); in r6_surface_init()434 if (!surf_man->hw_info.allow_2d && mode > RADEON_SURF_MODE_1D) { in r6_surface_init()439 mode = RADEON_SURF_MODE_1D; in r6_surface_init()462 case RADEON_SURF_MODE_1D: in r6_surface_init()591 surflevel->mode = RADEON_SURF_MODE_1D; in eg_surf_minify()[all …]
52 #define RADEON_SURF_MODE_1D 2 macro
293 if ((src_mode >= RADEON_SURF_MODE_1D) != (dst_mode >= RADEON_SURF_MODE_1D)) { in cik_sdma_copy_texture()294 struct si_texture *tiled = src_mode >= RADEON_SURF_MODE_1D ? ssrc : sdst; in cik_sdma_copy_texture()
450 [RADEON_SURF_MODE_1D] = "1D_TILED", in print_image_attrs()
1448 case RADEON_SURF_MODE_1D: in si_uvd_set_dt_surfaces()
1232 return RADEON_SURF_MODE_1D; in si_choose_tiling()
56 RADEON_SURF_MODE_1D = 2, enumerator
706 surf_level->mode = RADEON_SURF_MODE_1D; in gfx6_compute_level()1051 if (surf->flags & (RADEON_SURF_Z_OR_SBUFFER) && mode < RADEON_SURF_MODE_1D) in gfx6_compute_surface()1052 mode = RADEON_SURF_MODE_1D; in gfx6_compute_surface()1059 case RADEON_SURF_MODE_1D: in gfx6_compute_surface()2297 case RADEON_SURF_MODE_1D: in gfx9_compute_surface()2648 *mode = RADEON_SURF_MODE_1D; in ac_surface_set_bo_metadata()2685 else if (surf->u.legacy.level[0].mode >= RADEON_SURF_MODE_1D) in ac_surface_get_bo_metadata()
148 case RADEON_SURF_MODE_1D: in array_mode_to_string()
279 metadata->u.legacy.microtile = surface->u.legacy.level[0].mode >= RADEON_SURF_MODE_1D ? in r600_texture_init_metadata()309 *array_mode = RADEON_SURF_MODE_1D; in r600_surface_import_metadata()925 …x->non_disp_tiling = rtex->is_depth && rtex->surface.u.legacy.level[0].mode >= RADEON_SURF_MODE_1D; in r600_texture_create_object()1078 return RADEON_SURF_MODE_1D; in r600_choose_tiling()
746 case RADEON_SURF_MODE_1D: in r600_create_sampler_view_custom()847 case RADEON_SURF_MODE_1D: in r600_init_color_surface()1059 case RADEON_SURF_MODE_1D: in r600_init_depth_surface()2844 case RADEON_SURF_MODE_1D: return V_0280A0_ARRAY_1D_TILED_THIN1; in r600_array_mode()
856 dst->surface.u.legacy.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && in do_hardware_msaa_resolve()
42 case RADEON_SURF_MODE_1D: return V_028C70_ARRAY_1D_TILED_THIN1; in evergreen_array_mode()810 case RADEON_SURF_MODE_1D: in evergreen_fill_tex_resource_words()1153 case RADEON_SURF_MODE_1D: in evergreen_set_color_surface_common()1375 case RADEON_SURF_MODE_1D: in evergreen_init_depth_surface()
1215 case RADEON_SURF_MODE_1D: in ruvd_set_dt_surfaces()
896 md->mode = RADEON_SURF_MODE_1D; in radeon_bo_get_metadata()946 if (surf->u.legacy.level[0].mode >= RADEON_SURF_MODE_1D) in radeon_bo_set_metadata()
444 surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE); in radv_patch_surface_from_metadata()1389 metadata->u.legacy.microtile = surface->u.legacy.level[0].mode >= RADEON_SURF_MODE_1D in radv_init_metadata()