Searched refs:RC_MASK_XYZ (Results 1 – 8 of 8) sorted by relevance
519 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()520 srcmasks[1] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()544 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()569 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()570 srcmasks[1] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()571 srcmasks[2] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()
310 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()332 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()341 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()352 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()360 inst_mad->U.I.SrcReg[2].Negate = RC_MASK_XYZ; in radeonTransformTEX()367 inst_add->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()373 inst_add->U.I.SrcReg[1].Negate = RC_MASK_XYZ; in radeonTransformTEX()387 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()418 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()
92 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; in classify_instruction()295 inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction()305 pair->RGB.WriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction()
157 #define RC_MASK_XYZ (RC_MASK_X|RC_MASK_Y|RC_MASK_Z) macro
185 if (matchmask == (mask & RC_MASK_XYZ)) in r300_swizzle_split()
250 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; in rc_transform_fragment_wpos()265 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; in rc_transform_fragment_wpos()
123 if (inst->RGB.Src[src].Used && (refmasks[src] & RC_MASK_XYZ)) in reads_pair()125 refmasks[src] & RC_MASK_XYZ); in reads_pair()
359 if (mask & RC_MASK_XYZ) in rc_source_type_mask()