Searched refs:REG64 (Results 1 – 2 of 2) sorted by relevance
| /third_party/ffmpeg/libavcodec/x86/ |
| D | h264_cabac.c | 37 #define REG64 "r" macro
39 #define REG64 "m" macro
195 : "=&q"(coeff_count), "+"REG64(last), "+"REG64(index), "+&r"(c->low), in decode_significance_8x8_x86()
198 REG64(sig_off), REG64(last_coeff_ctx_base), in decode_significance_8x8_x86()
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| /third_party/mesa3d/src/freedreno/decode/ |
| D | cffdec.c | 541 #define REG64(x, fxn) { #x, .fxn64 = fxn, .is_reg64 = true } macro
687 REG64(SP_VS_OBJ_START, reg_disasm_gpuaddr64),
688 REG64(SP_HS_OBJ_START, reg_disasm_gpuaddr64),
689 REG64(SP_DS_OBJ_START, reg_disasm_gpuaddr64),
690 REG64(SP_GS_OBJ_START, reg_disasm_gpuaddr64),
691 REG64(SP_FS_OBJ_START, reg_disasm_gpuaddr64),
692 REG64(SP_CS_OBJ_START, reg_disasm_gpuaddr64),
694 REG64(SP_VS_TEX_CONST, reg_dump_gpuaddr64),
695 REG64(SP_VS_TEX_SAMP, reg_dump_gpuaddr64),
696 REG64(SP_HS_TEX_CONST, reg_dump_gpuaddr64),
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