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Searched refs:RegsUsed (Results 1 – 12 of 12) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNRegBankReassign.cpp156 BitVector RegsUsed; member in __anon25733a380111::GCNRegBankReassign
320 if (RegsUsed.test(Reg + I)) in getRegBankMask()
322 RegsUsed.set(Reg, Reg + Size); in getRegBankMask()
331 if (Reg + StartBit >= RegsUsed.size()) in getRegBankMask()
339 if (RegsUsed.test(StartBit + Reg + I)) in getRegBankMask()
341 RegsUsed.set(StartBit + Reg, StartBit + Reg + Size); in getRegBankMask()
360 RegsUsed.reset(); in analyzeInst()
749 RegsUsed.resize(AMDGPU::VGPR_32RegClass.getNumRegs() + in runOnMachineFunction()
798 RegsUsed.clear(); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceTargetLowering.cpp735 VarList &SortedSpilledVariables, SmallBitVector &RegsUsed, in getVarStackSlotParams() argument
777 RegsUsed[Var->getRegNum()] = true; in getVarStackSlotParams()
DIceTargetLowering.h422 SmallBitVector &RegsUsed, size_t *GlobalsSize,
DIceTargetLoweringARM32.cpp1322 RegsUsed = SmallBitVector(CalleeSaves.size()); in addProlog()
1345 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize, in addProlog()
1363 if (RegsUsed[RegARM32::Reg_fp]) { in addProlog()
1367 RegsUsed[RegARM32::Reg_fp] = true; in addProlog()
1371 RegsUsed[RegARM32::Reg_lr] = true; in addProlog()
1380 if (CalleeSaves[i] && RegsUsed[i]) { in addProlog()
DIceTargetLoweringMIPS32.cpp1502 RegsUsed = SmallBitVector(CalleeSaves.size()); in addProlog()
1527 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize, in addProlog()
1537 if (RegsUsed[RegMIPS32::Reg_FP]) { in addProlog()
1541 RegsUsed[RegMIPS32::Reg_FP] = true; in addProlog()
1545 RegsUsed[RegMIPS32::Reg_RA] = true; in addProlog()
1553 if (CalleeSaves[i] && RegsUsed[i]) { in addProlog()
DIceTargetLoweringMIPS32.h813 SmallBitVector RegsUsed; variable
DIceTargetLoweringX8664.h866 SmallBitVector RegsUsed; variable
DIceTargetLoweringX8632.h877 SmallBitVector RegsUsed; variable
DIceTargetLoweringX8664.cpp889 RegsUsed = SmallBitVector(CalleeSaves.size()); in addProlog()
917 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize, in addProlog()
930 if (RegsUsed[i]) { in addProlog()
951 (RegsUsed & getRegisterSet(RegSet_FramePointer, RegSet_None)).count() == in addProlog()
1182 if (CalleeSaves[i] && RegsUsed[i]) { in addEpilog()
DIceTargetLoweringX8632.cpp877 RegsUsed = SmallBitVector(CalleeSaves.size()); in addProlog()
905 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize, in addProlog()
918 if (RegsUsed[i]) { in addProlog()
939 (RegsUsed & getRegisterSet(RegSet_FramePointer, RegSet_None)).count() == in addProlog()
1200 if (CalleeSaves[i] && RegsUsed[i]) { in addEpilog()
DIceTargetLoweringARM32.h1072 SmallBitVector RegsUsed; variable
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp4043 SmallSet<unsigned, 8> RegsUsed; in LowerCall() local
4111 if (RegsUsed.count(VA.getLocReg())) { in LowerCall()
4133 RegsUsed.insert(VA.getLocReg()); in LowerCall()
4371 SmallSet<unsigned, 4> RegsUsed; in LowerReturn() local
4405 if (RegsUsed.count(VA.getLocReg())) { in LowerReturn()
4415 RegsUsed.insert(VA.getLocReg()); in LowerReturn()