/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 1052 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 206 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode() 230 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrFloat.td | 86 defm GE : ComparisonFP<SETOGE, "ge ", 0x60, 0x66>;
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D | WebAssemblyInstrSIMD.td | 502 defm GE : SIMDConditionFP<"ge", SETOGE, 69>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 203 case ISD::SETOGE: in kill()
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D | AMDGPUInstructions.td | 247 def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>;
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D | AMDGPUISelLowering.cpp | 1313 case ISD::SETOGE: in combineFMinMaxLegacy() 1608 SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE); in LowerDIVREM24() 2190 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE); in LowerFROUND_LegalFTRUNC()
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D | SIInstructions.td | 659 (SI_KILL_F32_COND_IMM_PSEUDO VSrc_b32:$src, 0, 3) // 3 means SETOGE
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 3801 case ISD::SETOGE: in SelectCC() 3828 case ISD::SETOGE: in SelectCC() 3861 case ISD::SETOGE: in getPredicateForSetCC() 3912 case ISD::SETOGE: in getCRIdxForSetCC() 3935 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst() 3946 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst() 3966 case ISD::SETOGE: in getVCmpInst()
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D | PPCInstrQPX.td | 989 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETOGE), 1036 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETOGE),
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D | PPCISelLowering.cpp | 504 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand); in PPCTargetLowering() 505 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand); in PPCTargetLowering() 924 setCondCodeAction(ISD::SETOGE, MVT::f128, Expand); in PPCTargetLowering() 7626 case ISD::SETOGE: in LowerSELECT_CC() 7664 case ISD::SETOGE: in LowerSELECT_CC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 410 case ISD::SETOGE: return "setoge"; in getOperationName()
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D | TargetLowering.cpp | 324 case ISD::SETOGE: in softenSetCCOperands() 3806 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC() 3807 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE); in SimplifySetCC() 3809 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
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D | SelectionDAG.cpp | 2020 case ISD::SETOGE: in FoldSetCC() 2110 case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan || in FoldSetCC()
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D | LegalizeDAG.cpp | 1686 case ISD::SETOGE: in LegalizeSetCCCondCode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 263 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand); in MipsSETargetLowering() 268 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand); in MipsSETargetLowering() 400 setCondCodeAction(ISD::SETOGE, Ty, Expand); in addMSAFloatType()
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D | MipsMSAInstrInfo.td | 128 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 129 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
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D | MipsISelLowering.cpp | 616 case ISD::SETOGE: return Mips::FCOND_OGE; in condCodeToFCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 686 def SETOGE : CondCode<"FCMP_OGE">; 1279 (setcc node:$lhs, node:$rhs, SETOGE)>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 852 case ISD::SETOGE: in IntCondCCodeToICC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.cpp | 159 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT, in RISCVTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 547 case ISD::SETOGE: in getPTXCmpMode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 2671 case ISD::SETOGE: in getVectorComparison() 2803 SDValue GE = getVectorCmp(DAG, getVectorComparison(ISD::SETOGE, Mode), in lowerVectorSETCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1396 case ISD::SETOGE: return SPCC::FCC_GE; in FPCondCCodeToFCC()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1859 case ISD::SETOGE: CondCode = ARMCC::GE; break; in FPCCToARMCC() 4651 if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE || in checkVSELConstraints() 6284 case ISD::SETOGE: in LowerVSETCC()
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