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Searched refs:SSE1 (Results 1 – 13 of 13) sorted by relevance

/third_party/skia/src/core/
DSkCpu.h15 SSE1 = 1 << 0, enumerator
65 features |= SSE1; in Supports()
97 features &= (SSE1 | SSE2 | SSE3 | SSSE3 | SSE41 | SSE42 | AVX); in Supports()
99 features &= (SSE1 | SSE2 | SSE3 | SSSE3 | SSE41); in Supports()
101 features &= (SSE1 | SSE2); in Supports()
DSkCpu.cpp43 if (abcd[3] & (1<<25)) { features |= SkCpu:: SSE1; } in read_cpu_features()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.h64 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
583 bool hasCMov() const { return HasCMov || X86SSELevel >= SSE1 || is64Bit(); } in hasCMov()
584 bool hasSSE1() const { return X86SSELevel >= SSE1; } in hasSSE1()
DX86InstrFormats.td562 // SSE1 Instruction Templates:
564 // SSI - SSE1 instructions with XS prefix.
565 // PSI - SSE1 instructions with PS prefix.
566 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
567 // VSSI - SSE1 instructions with XS prefix in AVX form.
568 // VPSI - SSE1 instructions with PS prefix in AVX form, packed single.
DX86InstrFPStack.td168 // f32 instructions can use SSE1 and are predicated on FPStackf32 == !SSE1.
DX86RegisterInfo.td555 // Ensure that float types are declared first - only float is legal on SSE1.
DX86.td63 def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1",
DX86InstrSSE.td222 // SSE1 & 2
676 // This pattern helps select MOVLPS on SSE1 only targets. With SSE2 we'll
742 // This pattern helps select MOVHPS on SSE1 only targets. With SSE2 we'll
2260 /// and later. There are SSE1 v4f32 patterns later.
2782 /// sse_fp_unop_s - SSE1 unops in scalar form
2896 /// sse1_fp_unop_p - SSE1 unops in packed form.
DX86InstrCompiler.td562 // SSE1/SSE2.
DX86InstrAVX512.td6361 // SSE1. And MOVLPS pattern is even more complex.
/third_party/ffmpeg/libavutil/x86/
Dx86util.asm122 ; identical behavior to TRANSPOSE4x4D, but using SSE1 float ops
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsX86.td172 // SSE1
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc23185 if (Bits[X86::FeatureSSE1] && X86SSELevel < SSE1) X86SSELevel = SSE1;