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Searched refs:SSSE3 (Results 1 – 25 of 45) sorted by relevance

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/third_party/ffmpeg/libavutil/x86/
Dcpu.h39 #define X86_SSSE3(flags) CPUEXT(flags, SSSE3)
40 #define X86_SSSE3_FAST(flags) CPUEXT_FAST(flags, SSSE3)
41 #define X86_SSSE3_SLOW(flags) CPUEXT_SLOW(flags, SSSE3)
65 #define EXTERNAL_SSSE3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, SSSE3)
66 #define EXTERNAL_SSSE3_FAST(flags) CPUEXT_SUFFIX_FAST(flags, _EXTERNAL, SSSE3)
67 #define EXTERNAL_SSSE3_SLOW(flags) CPUEXT_SUFFIX_SLOW(flags, _EXTERNAL, SSSE3)
96 #define INLINE_SSSE3(flags) CPUEXT_SUFFIX(flags, _INLINE, SSSE3)
97 #define INLINE_SSSE3_FAST(flags) CPUEXT_SUFFIX_FAST(flags, _INLINE, SSSE3)
98 #define INLINE_SSSE3_SLOW(flags) CPUEXT_SUFFIX_SLOW(flags, _INLINE, SSSE3)
Dx86util.asm360 %macro ABSB 2 ; source mmreg, temp mmreg (unused for SSSE3)
370 %macro ABSB2 4 ; src1, src2, tmp1, tmp2 (tmp1/2 unused for SSSE3)
Dx86inc.asm1041 ; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
/third_party/skia/src/core/
DSkCpu.h18 SSSE3 = 1 << 3, enumerator
74 features |= SSSE3; in Supports()
97 features &= (SSE1 | SSE2 | SSE3 | SSSE3 | SSE41 | SSE42 | AVX); in Supports()
99 features &= (SSE1 | SSE2 | SSE3 | SSSE3 | SSE41); in Supports()
DSkCpu.cpp46 if (abcd[2] & (1<< 9)) { features |= SkCpu::SSSE3; } in read_cpu_features()
/third_party/skia/third_party/externals/swiftshader/src/Common/
DCPUID.hpp59 static bool SSSE3; member in sw::CPUID
118 return SSSE3 && enableSSSE3; in supportsSSSE3()
DCPUID.cpp37 bool CPUID::SSSE3 = detectSSSE3(); member in sw::CPUID
220 return SSSE3 = (registers[2] & 0x00000200) != 0; in detectSSSE3()
/third_party/node/deps/base64/base64/
DREADME.md6 with SIMD (AVX2, AVX512, NEON, AArch64/NEON, SSSE3, SSE4.1, SSE4.2, AVX) and
17 processor supports AVX2, SSSE3, SSE4.1, SSE4.2 or AVX instructions, the library
33 routines even outperform the SSSE3 ones.
60 The SSSE3 and AVX2 codecs were substantially improved by using some very clever
114 ### SSSE3 subsection
116 To build and include the SSSE3 codec, set the `SSSE3_CFLAGS` environment variable to a value that w…
123 … codec will only be used if runtime feature detection shows that the target machine supports SSSE3.
204 An example of running a benchmark with OpenMP, SSSE3 and AVX2 enabled:
445 | Processor | Plain enc | Plain dec | SSSE3 enc | SSSE3 dec | AVX e…
DCMakeLists.txt56 add_feature_info(SSSE3 BASE64_WITH_SSSE3 "add SSSE 3 codepath")
207 configure_codec(SSSE3 __SSSE3__)
/third_party/node/deps/v8/src/codegen/shared-ia32-x64/
Dmacro-assembler-shared-ia32-x64.h82 CpuFeatureScope sse_scope(this, SSSE3); in Pshufb()
199 AvxHelper<Dst, Arg, Args...>{this, base::Optional<CpuFeature>(SSSE3)} \
832 CpuFeatureScope sse_scope(this, SSSE3); in I16x8ExtAddPairwiseI8x16S()
853 CpuFeatureScope sse_scope(this, SSSE3); in I16x8ExtAddPairwiseI8x16U()
880 CpuFeatureScope sse_scope(this, SSSE3);
940 CpuFeatureScope sse_scope(this, SSSE3); in I8x16Popcnt()
/third_party/node/deps/v8/src/codegen/
Dcpu-features.h19 SSSE3, enumerator
/third_party/node/deps/zlib/patches/
D0013-cpu-feature-detection-for-arm.patch24 - * Use SSSE3 to compute the adler32. Since this routine can be
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.h64 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
587 bool hasSSSE3() const { return X86SSELevel >= SSSE3; } in hasSSSE3()
DX86InstrMMX.td74 /// Unary MMX instructions requiring SSSE3.
89 /// Binary MMX instructions requiring SSSE3.
110 /// PALIGN MMX instructions (require SSSE3).
DX86InstrFormats.td677 // SSSE3 Instruction Templates:
679 // SS38I - SSSE3 instructions with T8 prefix.
680 // SS3AI - SSSE3 instructions with TA prefix.
681 // MMXSS38I - SSSE3 instructions with T8 prefix and MMX operands.
682 // MMXSS3AI - SSSE3 instructions with TA prefix and MMX operands.
684 // Note: SSSE3 instructions have 64-bit and 128-bit versions. The 64-bit version
DX86.td71 def FeatureSSSE3 : SubtargetFeature<"ssse3", "X86SSELevel", "SSSE3",
72 "Enable SSSE3 instructions",
/third_party/node/deps/v8/src/codegen/ia32/
Dassembler-ia32.cc128 if (FLAG_wasm_simd_ssse3_codegen && IsSupported(SSSE3)) return true; in SupportsWasmSimd128()
143 if (cpu.has_ssse3()) SetSupported(SSSE3); in ProbeImpl()
166 if (!FLAG_enable_ssse3 || !IsSupported(SSE3)) SetUnsupported(SSSE3); in ProbeImpl()
167 if (!FLAG_enable_sse4_1 || !IsSupported(SSSE3)) SetUnsupported(SSE4_1); in ProbeImpl()
186 CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSSE3), in PrintFeatures()
331 EnableCpuFeature(SSSE3); in Assembler()
333 if (CpuFeatures::IsSupported(SSSE3)) { in Assembler()
2697 DCHECK(IsEnabled(SSSE3)); in palignr()
3185 DCHECK(IsEnabled(SSSE3)); in ssse3_instr()
/third_party/python/Modules/_blake2/impl/
Dblake2-dispatch.c28 SSSE3 = 2, enumerator
112 feature = SSSE3; in get_cpu_features()
/third_party/node/deps/v8/src/codegen/x64/
Dassembler-x64.cc81 if (FLAG_wasm_simd_ssse3_codegen && IsSupported(SSSE3)) return true; in SupportsWasmSimd128()
97 if (cpu.has_ssse3()) SetSupported(SSSE3); in ProbeImpl()
122 if (!FLAG_enable_ssse3 || !IsSupported(SSE3)) SetUnsupported(SSSE3); in ProbeImpl()
123 if (!FLAG_enable_sse4_1 || !IsSupported(SSSE3)) SetUnsupported(SSE4_1); in ProbeImpl()
149 CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSSE3), in PrintFeatures()
360 EnableCpuFeature(SSSE3); in Assembler()
362 if (CpuFeatures::IsSupported(SSSE3)) { in Assembler()
4183 DCHECK(IsEnabled(SSSE3)); in ssse3_instr()
4195 DCHECK(IsEnabled(SSSE3)); in ssse3_instr()
/third_party/openssl/doc/man3/
DOPENSSL_ia32cap.pod45 =item bit #41 denoting SSSE3, Supplemental SSE3, support;
/third_party/openh264/codec/common/x86/
Dvaa.asm51 ; by comparing it outperforms than phaddw(SSSE3) sets
/third_party/ffmpeg/libavcodec/x86/
Dh264_chromamc.asm2 ;* MMX/SSSE3-optimized functions for H.264 chroma MC
Dh264_qpel_8bit.asm2 ;* MMX/SSE2/SSSE3-optimized H.264 QPEL code
/third_party/skia/
Dpublic.bzl66 SKIA_OPTS_SSSE3 = "SSSE3"
/third_party/openh264/
DRELEASES101 - Added SSSE3 motion compensation routines

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