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Searched refs:ScaledReg (Results 1 – 3 of 3) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp355 const SCEV *ScaledReg = nullptr; member
467 if (!ScaledReg) in isCanonical()
476 const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg); in isCanonical()
505 if (!ScaledReg) { in canonicalize()
506 ScaledReg = BaseRegs.back(); in canonicalize()
514 const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg); in canonicalize()
522 std::swap(ScaledReg, *I); in canonicalize()
534 BaseRegs.push_back(ScaledReg); in unscale()
535 ScaledReg = nullptr; in unscale()
542 if (BaseRegs.size() != 1 || ScaledReg) in hasZeroEnd()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp1108 Register ScaledReg = in eliminateFrameIndex() local
1112 ScaledReg) in eliminateFrameIndex()
1122 MIB.addReg(ScaledReg, RegState::Kill); in eliminateFrameIndex()
1139 MIB.addReg(ScaledReg, RegState::Kill); in eliminateFrameIndex()
1151 Register ScaledReg = TmpScaledReg.isValid() ? TmpScaledReg : DiffReg; in eliminateFrameIndex() local
1153 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_LSHR_B32), ScaledReg) in eliminateFrameIndex()
1156 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_ADD_U32), ScaledReg) in eliminateFrameIndex()
1157 .addReg(ScaledReg, RegState::Kill) in eliminateFrameIndex()
1160 .addReg(ScaledReg, RegState::Kill); in eliminateFrameIndex()
1164 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_SUB_U32), ScaledReg) in eliminateFrameIndex()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DCodeGenPrepare.cpp2181 Value *ScaledReg = nullptr; member
2210 if (ScaledReg && other.ScaledReg && in compare()
2211 ScaledReg->getType() != other.ScaledReg->getType()) in compare()
2226 if (ScaledReg != other.ScaledReg) in compare()
2258 return ScaledReg; in GetFieldAsValue()
2281 ScaledReg = V; in SetCombinedField()
2294 assert(ScaledReg == nullptr); in SetCombinedField()
2295 ScaledReg = V; in SetCombinedField()
2340 ScaledReg->printAsOperand(OS, /*PrintType=*/false); in print()
3249 !NewAddrMode.ScaledReg); in addNewAddrMode()
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