Searched refs:SrcReg0 (Results 1 – 4 of 4) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SIMDInstrOpt.cpp | 430 Register SrcReg0 = MI.getOperand(1).getReg(); in optimizeVectElement() local 451 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement() 463 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement()
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D | AArch64InstrInfo.cpp | 2828 unsigned SrcReg0 = SrcReg; in storeRegPairToStackSlot() local 2831 SrcReg0 = TRI.getSubReg(SrcReg, SubIdx0); in storeRegPairToStackSlot() 2837 .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0) in storeRegPairToStackSlot() 4179 Register SrcReg0 = MUL->getOperand(1).getReg(); in genFusedMultiply() local 4197 if (Register::isVirtualRegister(SrcReg0)) in genFusedMultiply() 4198 MRI.constrainRegClass(SrcReg0, RC); in genFusedMultiply() 4207 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply() 4213 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply() 4219 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply() 4330 Register SrcReg0 = MUL->getOperand(1).getReg(); in genMaddR() local [all …]
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/third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_program_alu.c | 64 struct rc_src_register SrcReg0, struct rc_src_register SrcReg1) in emit2() argument 74 fpi->U.I.SrcReg[0] = SrcReg0; in emit2() 83 struct rc_src_register SrcReg0, struct rc_src_register SrcReg1, in emit3() argument 94 fpi->U.I.SrcReg[0] = SrcReg0; in emit3()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstructionSelector.cpp | 1362 Register SrcReg0 = I.getOperand(1).getReg(); in selectMergeValues() local 1365 const LLT SrcTy = MRI.getType(SrcReg0); in selectMergeValues()
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