| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 574 unsigned SuperReg = 0; in FindSuitableFreeRegisters() local
577 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg)) in FindSuitableFreeRegisters()
578 SuperReg = Reg; in FindSuitableFreeRegisters()
600 if (Reg == SuperReg) continue; in FindSuitableFreeRegisters()
601 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters()
616 dbgs() << "*** Performing rename " << printReg(SuperReg, TRI) in FindSuitableFreeRegisters()
630 TRI->getMinimalPhysRegClass(SuperReg, MVT::Other); in FindSuitableFreeRegisters()
652 if (NewSuperReg == SuperReg) continue; in FindSuitableFreeRegisters()
663 if (Reg == SuperReg) { in FindSuitableFreeRegisters()
666 unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg); in FindSuitableFreeRegisters()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 762 Register SuperReg = MI->getOperand(0).getReg(); in spillSGPR() local
768 assert(SpillToVGPR || (SuperReg != MFI->getStackPtrOffsetReg() && in spillSGPR()
769 SuperReg != MFI->getFrameOffsetReg() && in spillSGPR()
770 SuperReg != MFI->getScratchWaveOffsetReg())); in spillSGPR()
772 assert(SuperReg != AMDGPU::M0 && "m0 should never spill"); in spillSGPR()
775 const TargetRegisterClass *RC = getPhysRegClass(SuperReg); in spillSGPR()
788 NumSubRegs == 1 ? SuperReg : getSubReg(SuperReg, SplitParts[i]); in spillSGPR()
832 Mov.addReg(SuperReg, RegState::Implicit | SuperKillState); in spillSGPR()
874 Register SuperReg = MI->getOperand(0).getReg(); in restoreSGPR() local
876 assert(SuperReg != AMDGPU::M0 && "m0 should never spill"); in restoreSGPR()
[all …]
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| D | SIInstrInfo.h | 71 MachineOperand &SuperReg,
77 MachineOperand &SuperReg,
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| D | SIInstrInfo.cpp | 3863 MachineOperand &SuperReg, in buildExtractSubReg() argument
3872 if (SuperReg.getSubReg() == AMDGPU::NoSubRegister) { in buildExtractSubReg()
3874 .addReg(SuperReg.getReg(), 0, SubIdx); in buildExtractSubReg()
3885 .addReg(SuperReg.getReg(), 0, SuperReg.getSubReg()); in buildExtractSubReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 2133 SDValue SuperReg = SDValue(VLd, 0); in SelectVLD() local
2140 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2377 SDValue SuperReg; in SelectVLDSTLane() local
2382 SuperReg = SDValue(createDRegPairNode(MVT::v2i64, V0, V1), 0); in SelectVLDSTLane()
2384 SuperReg = SDValue(createQRegPairNode(MVT::v4i64, V0, V1), 0); in SelectVLDSTLane()
2391 SuperReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0); in SelectVLDSTLane()
2393 SuperReg = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0); in SelectVLDSTLane()
2395 Ops.push_back(SuperReg); in SelectVLDSTLane()
2411 SuperReg = SDValue(VLdLn, 0); in SelectVLDSTLane()
2418 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1291 SDValue SuperReg = SDValue(Ld, 0); in SelectLoad() local
1294 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1324 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoad() local
1326 ReplaceUses(SDValue(N, 0), SuperReg); in SelectPostLoad()
1330 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1436 SDValue SuperReg = SDValue(Ld, 0); in SelectLoadLane() local
1442 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane()
1485 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoadLane() local
1488 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1495 SuperReg); in SelectPostLoadLane()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 913 MCRegister SuperReg = in copyPhysReg() local
916 if (VSXSelfCopyCrash && SrcReg == SuperReg) in copyPhysReg()
919 DestReg = SuperReg; in copyPhysReg()
922 MCRegister SuperReg = in copyPhysReg() local
925 if (VSXSelfCopyCrash && DestReg == SuperReg) in copyPhysReg()
928 SrcReg = SuperReg; in copyPhysReg()
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