| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 66 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
68 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
76 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
83 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
87 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
88 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); in LowerBSWAP()
105 Value* Tmp2 = Builder.CreateLShr(V, in LowerBSWAP() local
131 Tmp2 = Builder.CreateAnd(Tmp2, in LowerBSWAP()
138 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
140 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6"); in LowerBSWAP()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 367 SDValue Tmp2 = Val; in PerformInsertVectorEltInMemory() local
390 Ch = DAG.getTruncStore(Ch, dl, Tmp2, StackPtr2, MachinePointerInfo(), EltVT); in PerformInsertVectorEltInMemory()
1592 SDValue Tmp2 = SDValue(Node, 1); in ExpandDYNAMIC_STACKALLOC() local
1600 SDValue Size = Tmp2.getOperand(1); in ExpandDYNAMIC_STACKALLOC()
1612 Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true), in ExpandDYNAMIC_STACKALLOC()
1616 Results.push_back(Tmp2); in ExpandDYNAMIC_STACKALLOC()
2605 SDValue Tmp, Tmp2, Tmp3; in ExpandBITREVERSE() local
2623 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(MaskHi4, dl, VT)); in ExpandBITREVERSE()
2625 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp2, DAG.getConstant(4, dl, SHVT)); in ExpandBITREVERSE()
2627 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in ExpandBITREVERSE()
[all …]
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| D | SelectionDAG.cpp | 1940 SDValue Tmp2 = Node->getOperand(1); in expandVAArg() local
1944 Tmp2, MachinePointerInfo(V)); in expandVAArg()
1963 getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V)); in expandVAArg()
3510 unsigned Tmp, Tmp2; in ComputeNumSignBits() local
3541 Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1); in ComputeNumSignBits()
3548 Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1); in ComputeNumSignBits()
3550 Tmp = std::min(Tmp, Tmp2); in ComputeNumSignBits()
3577 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1); in ComputeNumSignBits()
3578 Tmp = std::min(Tmp, Tmp2); in ComputeNumSignBits()
3618 Tmp2 = VTBits; in ComputeNumSignBits()
[all …]
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| D | LegalizeFloatTypes.cpp | 1708 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1711 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), in FloatExpandSetCCOperands()
1713 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1716 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1718 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3609 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
3610 if (tryFoldLoad(Node, N0.getNode(), Input, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in matchBEXTRFromAndImm()
3612 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)}; in matchBEXTRFromAndImm()
3645 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
3646 if (MayFoldLoad && tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPISTR()
3647 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPISTR()
3678 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
3679 if (MayFoldLoad && tryFoldLoad(Node, N2, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in emitPCMPESTR()
3680 SDValue Ops[] = { N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Imm, in emitPCMPESTR()
4226 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Load; in tryVPTESTM() local
[all …]
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| D | X86ISelLowering.cpp | 18499 SDValue Tmp2, Tmp3; in LowerShiftParts() local
18501 Tmp2 = DAG.getNode(ISD::FSHL, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts()
18504 Tmp2 = DAG.getNode(ISD::FSHR, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts()
18518 Hi = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp3, Tmp2); in LowerShiftParts()
18521 Lo = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp3, Tmp2); in LowerShiftParts()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 132 Value *Tmp2 = Builder.CreateXor(Tmp, Dividend); in generateSignedDivisionCode() local
133 Value *U_Dvnd = Builder.CreateSub(Tmp2, Tmp); in generateSignedDivisionCode()
272 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode() local
273 Value *Q = Builder.CreateShl(Dividend, Tmp2); in generateUnsignedDivisionCode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | ValueTracking.cpp | 2484 unsigned Tmp, Tmp2; in ComputeNumSignBitsImpl() local
2572 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBitsImpl()
2573 return Tmp - Tmp2; in ComputeNumSignBitsImpl()
2583 Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q); in ComputeNumSignBitsImpl()
2584 FirstAnswer = std::min(Tmp, Tmp2); in ComputeNumSignBitsImpl()
2601 Tmp2 = ComputeNumSignBits(U->getOperand(2), Depth + 1, Q); in ComputeNumSignBitsImpl()
2602 return std::min(Tmp, Tmp2); in ComputeNumSignBitsImpl()
2628 Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q); in ComputeNumSignBitsImpl()
2629 if (Tmp2 == 1) break; in ComputeNumSignBitsImpl()
2630 return std::min(Tmp, Tmp2) - 1; in ComputeNumSignBitsImpl()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 1961 SmallVector<MachineOperand,1> Tmp2; in createPreheaderForLoop() local
1969 Tmp2.clear(); in createPreheaderForLoop()
1970 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop()
1973 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop()
1982 bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
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| D | HexagonSplitDouble.cpp | 695 auto *Tmp2 = MF.getMachineMemOperand(Ptr, F, 4/*size*/, std::min(A, 4)); in splitMemRef() local
696 HighI->addMemOperand(MF, Tmp2); in splitMemRef()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/lib/Support/ |
| D | APInt.cpp | 738 uint16_t Tmp2 = uint16_t(VAL); in byteSwap() local
739 Tmp2 = ByteSwap_16(Tmp2); in byteSwap()
740 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | APInt.cpp | 681 uint16_t Tmp2 = uint16_t(U.VAL); in byteSwap() local
682 Tmp2 = ByteSwap_16(Tmp2); in byteSwap()
683 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 2003 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
2004 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
2063 SDValue Tmp2 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts() local
2064 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
2416 SDValue Tmp2 = ST->getBasePtr(); in LowerSTOREi1() local
2421 DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), MVT::i8, in LowerSTOREi1()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2123 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC() local
2125 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
2141 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT() local
2152 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFRINT()
2230 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1, in LowerFROUND64() local
2232 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2); in LowerFROUND64()
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| D | AMDGPULegalizerInfo.cpp | 1373 auto Tmp2 = B.buildFSub(Ty, Tmp1, CopySign); in legalizeFrint() local
1379 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFrint()
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| D | SIInstrInfo.cpp | 671 unsigned Tmp2 = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0); in copyPhysReg() local
672 if (!Tmp2 || RI.getHWRegIndex(Tmp2) >= MaxVGPRs) in copyPhysReg()
674 Tmp = Tmp2; in copyPhysReg()
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| D | SIISelLowering.cpp | 9070 SDValue Tmp2 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(1)); in performIntMed3ImmCombine() local
9073 SDValue Med3 = DAG.getNode(Med3Opc, SL, NVT, Tmp1, Tmp2, Tmp3); in performIntMed3ImmCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 7110 Register Tmp2 = MRI.createVirtualRegister(RC); in emitAtomicLoadBinary() local
7111 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp); in emitAtomicLoadBinary()
7113 .addReg(Tmp2).addImm(-1); in emitAtomicLoadBinary()
7401 Register Tmp2 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass); in emitPair128() local
7404 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), Tmp2) in emitPair128()
7407 .addReg(Tmp2).addReg(Lo).addImm(SystemZ::subreg_l64); in emitPair128()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 5271 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
5273 SDValue(Tmp2, 0))); in Select()
5285 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
5287 SDValue(Tmp2, 0))); in Select()
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| D | PPCISelLowering.cpp | 8375 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); in LowerSHL_PARTS() local
8377 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); in LowerSHL_PARTS()
8404 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRL_PARTS() local
8406 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRL_PARTS()
8432 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRA_PARTS() local
8434 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRA_PARTS()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 3574 SDValue Tmp2 = CurDAG->getTargetConstant(CC, dl, MVT::i32); in Select() local
3575 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select()
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| D | ARMISelLowering.cpp | 5865 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts() local
5866 SDValue LoSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
5905 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts() local
5906 SDValue HiSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
|