| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 353 MachineInstrBuilder MachineIRBuilder::buildBrCond(Register Tst, in buildBrCond() argument
355 assert(getMRI()->getType(Tst).isScalar() && "invalid operand type"); in buildBrCond()
357 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest); in buildBrCond()
715 const SrcOp &Tst, in buildSelect() argument
720 return buildInstr(TargetOpcode::G_SELECT, {Res}, {Tst, Op0, Op1}, Flags); in buildSelect()
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| D | IRTranslator.cpp | 390 Register Tst = getOrCreateVReg(*BrInst.getCondition()); in translateBr() local
393 MIRBuilder.buildBrCond(Tst, TrueBB); in translateBr()
1008 Register Tst = getOrCreateVReg(*U.getOperand(0)); in translateSelect() local
1020 {Tst, Op0Regs[i], Op1Regs[i]}, Flags); in translateSelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 637 MachineInstrBuilder buildBrCond(Register Tst, MachineBasicBlock &Dest);
935 MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,
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| /third_party/vixl/benchmarks/aarch64/ |
| D | bench-utils.cc | 223 __ Tst(PickR(size), Operand(PickR(size))); in GenerateOperandSequence() local
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64-inl.h | 38 void TurboAssembler::Tst(const Register& rn, const Operand& operand) { in Tst() function
1391 Tst(reg, bit_pattern); in TestAndBranchIfAnySet()
1404 Tst(reg, bit_pattern); in TestAndBranchIfAllClear()
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| D | macro-assembler-arm64.cc | 1337 Tst(temp, 15); in AssertSpAligned()
1452 Tst(fpcr, RMode_mask); in AssertFPCRState()
1542 Tst(object, kSmiTagMask); in AssertSmi()
1550 Tst(object, kSmiTagMask); in AssertNotSmi()
1576 Tst(temp, Operand(Map::Bits1::IsConstructorBit::kMask)); in AssertConstructor()
3089 Tst(scratch, kTaggedSize - 1); in TruncateDoubleToI()
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| D | macro-assembler-arm64.h | 683 inline void Tst(const Register& rn, const Operand& operand);
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| /third_party/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-operand-const-a32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-const-t32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-rn-a32.cc | 123 M(Tst) \
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| D | test-simulator-cond-rd-operand-rn-t32.cc | 123 M(Tst) \
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| D | test-disasm-a32.cc | 2354 TEST_SHIFT_T32(Tst, "tst", 0x0000000a) in TEST()
2371 TEST_WIDE_IMMEDIATE(Tst, "tst", 0x0000000e); in TEST()
2374 TEST_WIDE_IMMEDIATE_PC(Tst, "tst", 0x0000000e); in TEST()
3685 COMPARE_T32(Tst(eq, r0, r1), in TEST()
3689 COMPARE_T32(Tst(eq, r8, r9), in TEST()
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| D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 123 M(Tst)
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| D | test-simulator-cond-rd-operand-rn-shift-rs-a32.cc | 123 M(Tst)
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| /third_party/node/deps/v8/src/baseline/arm64/ |
| D | baseline-assembler-arm64-inl.h | 169 __ Tst(value, Immediate(mask)); in TestAndBranch()
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| /third_party/node/deps/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 1039 __ Tst(params_size, kSystemPointerSize - 1); in LeaveInterpreterFrame() local
1168 __ Tst(bytecode, Operand(0x1)); in AdvanceBytecodeOffsetOrReturn() local
3406 __ Tst(result, kXSignMask); in Generate_DoubleToI() local
3923 __ Tst(x1, kSmiTagMask); in Generate_DeoptimizationEntry() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 422 Tst, enumerator
1067 using InstARM32Tst = InstARM32CmpLike<InstARM32::Tst>;
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| D | IceInstARM32.cpp | 3461 template class InstARM32CmpLike<InstARM32::Tst>;
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| D | code-generator-arm64.cc | 1588 __ Tst(i.InputOrZeroRegister64(0), i.InputOperand2_64(1)); in AssembleArchInstruction() local
1591 __ Tst(i.InputOrZeroRegister32(0), i.InputOperand2_32(1)); in AssembleArchInstruction() local
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| /third_party/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 11954 __ Tst(x0, kAddressTagMask); in TEST() local
11983 __ Tst(lr, kAddressTagMask); in TEST() local
11990 __ Tst(x0, kAddressTagMask); in TEST() local
12020 __ Tst(x10, kAddressTagMask); in TEST() local
12025 __ Tst(x11, kAddressTagMask); in TEST() local
12032 __ Tst(x0, kAddressTagMask); in TEST() local
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| D | test-disasm-aarch64.cc | 2895 COMPARE_MACRO(Tst(xzr, Operand(w1, SXTW)), in TEST()
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| /third_party/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 817 void MacroAssembler::Tst(const Register& rn, const Operand& operand) { in Emit() function in vixl::aarch64::MacroAssembler
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