| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrItineraries.h | 182 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
192 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
196 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
203 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
211 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
217 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
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| D | MCSubtargetInfo.h | 177 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
184 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
186 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
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| D | MCSchedule.h | 96 unsigned UseIdx; member
101 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LiveRangeEdit.cpp | 108 SlotIndex UseIdx) const { in allUsesAvailableAt()
110 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
131 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
134 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
141 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
158 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
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| D | TargetSchedule.cpp | 174 unsigned UseIdx = 0; in findUseIdx() local
178 ++UseIdx; in findUseIdx()
180 return UseIdx; in findUseIdx()
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
233 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
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| D | MachineCopyPropagation.cpp | 284 const MachineInstr &UseI, unsigned UseIdx);
287 unsigned UseIdx);
386 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy() argument
390 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isBackwardPropagatableRegClassCopy()
403 unsigned UseIdx) { in isForwardableRegClassCopy() argument
410 UseI.getRegClassConstraint(UseIdx, TII, TRI)) in isForwardableRegClassCopy()
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| D | InlineSpiller.cpp | 551 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local
552 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
561 LLVM_DEBUG(dbgs() << UseIdx << '\t' << MI); in reMaterializeFor()
569 VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx); in reMaterializeFor()
573 if (!Edit->canRematerializeAt(RM, OrigVNI, UseIdx, false)) { in reMaterializeFor()
575 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
583 LLVM_DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << MI); in reMaterializeFor()
600 LLVM_DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << MI); in reMaterializeFor()
628 LLVM_DEBUG(dbgs() << "\t " << UseIdx << '\t' << MI << '\n'); in reMaterializeFor()
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| D | LiveRangeCalc.cpp | 190 SlotIndex UseIdx; in extendToUses() local
195 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB()); in extendToUses()
207 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
212 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
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| D | RegisterCoalescer.cpp | 297 void addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx,
848 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
849 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
902 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
903 LiveInterval::iterator US = IntA.FindSegmentContaining(UseIdx); in removeCopyByCommutingDef()
923 SlotIndex DefIdx = UseIdx.getRegSlot(); in removeCopyByCommutingDef()
1620 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1628 if (SR.liveAt(UseIdx)) { in eliminateUndefCopy()
1634 isLive = DstLI.liveAt(UseIdx); in eliminateUndefCopy()
1638 LLVM_DEBUG(dbgs() << "\tnew undef: " << UseIdx << '\t' << MI); in eliminateUndefCopy()
[all …]
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| D | MachineVerifier.cpp | 266 SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit,
1870 unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, in checkLivenessAtUse() argument
1872 LiveQueryResult LRQ = LR.Query(UseIdx); in checkLivenessAtUse()
1879 report_context(UseIdx); in checkLivenessAtUse()
1887 report_context(UseIdx); in checkLivenessAtUse()
1953 SlotIndex UseIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local
1960 checkLivenessAtUse(MO, MONum, UseIdx, *LR, *Units); in checkLiveness()
1968 checkLivenessAtUse(MO, MONum, UseIdx, LI, Reg); in checkLiveness()
1979 checkLivenessAtUse(MO, MONum, UseIdx, SR, Reg, SR.LaneMask); in checkLiveness()
1980 LiveQueryResult LRQ = SR.Query(UseIdx); in checkLiveness()
[all …]
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| D | MachineCombiner.cpp | 195 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth() local
197 InstrPtr, UseIdx); in getDepth()
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| D | TargetInstrInfo.cpp | 1038 SDNode *UseNode, unsigned UseIdx) const { in getOperandLatency()
1049 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
1191 unsigned UseIdx) const { in getOperandLatency()
1194 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
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| D | SplitKit.h | 386 SlotIndex UseIdx,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
679 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
680 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
688 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
720 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
722 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
731 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
732 LLVM_DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
762 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
763 SwapVector[UseIdx].WillRemove = 1; in markSwapsForRemoval()
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| D | PPCInstrInfo.h | 215 unsigned UseIdx) const override;
218 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument
220 UseNode, UseIdx); in getOperandLatency()
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| D | PPCInstrInfo.cpp | 178 unsigned UseIdx) const { in getOperandLatency()
180 UseMI, UseIdx); in getOperandLatency()
1346 unsigned UseIdx; in FoldImmediate() local
1347 for (UseIdx = 0; UseIdx < UseMI.getNumOperands(); ++UseIdx) in FoldImmediate()
1348 if (UseMI.getOperand(UseIdx).isReg() && in FoldImmediate()
1349 UseMI.getOperand(UseIdx).getReg() == Reg) in FoldImmediate()
1352 assert(UseIdx < UseMI.getNumOperands() && "Cannot find Reg in UseMI"); in FoldImmediate()
1353 assert(UseIdx < UseMCID.getNumOperands() && "No operand description for Reg"); in FoldImmediate()
1355 const MCOperandInfo *UseInfo = &UseMCID.OpInfo[UseIdx]; in FoldImmediate()
1384 UseMI.getOperand(UseIdx).setReg(ZeroReg); in FoldImmediate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 320 unsigned UseIdx) const override;
323 SDNode *UseNode, unsigned UseIdx) const override;
360 unsigned UseIdx, unsigned UseAlign) const;
364 unsigned UseIdx, unsigned UseAlign) const;
369 unsigned UseIdx, unsigned UseAlign) const;
375 const MachineInstr &UseMI, unsigned UseIdx,
391 unsigned UseIdx) const override;
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| D | ARMBaseInstrInfo.cpp | 3838 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle() argument
3839 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getVSTMUseCycle()
3841 return ItinData->getOperandCycle(UseClass, UseIdx); in getVSTMUseCycle()
3878 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle() argument
3879 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1; in getSTMUseCycle()
3881 return ItinData->getOperandCycle(UseClass, UseIdx); in getSTMUseCycle()
3908 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency() argument
3912 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands()) in getOperandLatency()
3913 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx); in getOperandLatency()
3963 UseCycle = ItinData->getOperandCycle(UseClass, UseIdx); in getOperandLatency()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | AbstractCallSite.cpp | 100 unsigned UseIdx = CS.getArgumentNo(U); in AbstractCallSite() local
107 if (CBCalleeIdx != UseIdx) in AbstractCallSite()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | LiveRangeEdit.h | 102 SlotIndex UseIdx) const;
212 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
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| D | TargetInstrInfo.h | 1454 SDNode *UseNode, unsigned UseIdx) const;
1467 unsigned UseIdx) const;
1500 unsigned UseIdx) const { in hasHighOperandLatency() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.cpp | 349 unsigned UseIdx = -1; in adjustSchedDependency() local
353 UseIdx = OpNum; in adjustSchedDependency()
358 0, *DDst, UseIdx)); in adjustSchedDependency()
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| D | HexagonInstrInfo.h | 312 unsigned UseIdx) const override;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 621 unsigned UseIdx; in FoldImmediate() local
633 UseIdx = 2; in FoldImmediate()
635 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
647 UseIdx = 2; in FoldImmediate()
649 UseIdx = 2, CommuteIdx = 1; in FoldImmediate()
658 if (!commuteInstruction(UseMI, false, CommuteIdx, UseIdx)) in FoldImmediate()
665 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1850 SlotIndex UseIdx = LIS->getInstructionIndex(Use); in findReachingDef() local
1863 V = S.getVNInfoAt(UseIdx); in findReachingDef()
1868 V = LI.getVNInfoAt(UseIdx); in findReachingDef()
1877 if (VNInfo *V = LR.getVNInfoAt(UseIdx)) { in findReachingDef()
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