Searched refs:VECREDUCE_ADD (Results 1 – 15 of 15) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 937 VECREDUCE_ADD, VECREDUCE_MUL, enumerator
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 474 case ISD::VECREDUCE_ADD: in LegalizeOp() 978 case ISD::VECREDUCE_ADD: in Expand()
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D | SelectionDAGDumper.cpp | 440 case ISD::VECREDUCE_ADD: return "vecreduce_add"; in getOperationName()
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D | LegalizeVectorTypes.cpp | 606 case ISD::VECREDUCE_ADD: in ScalarizeVectorOperand() 1986 case ISD::VECREDUCE_ADD: in SplitVectorOperand() 2072 case ISD::VECREDUCE_ADD: CombineOpc = ISD::ADD; break; in SplitVecOp_VECREDUCE() 4227 case ISD::VECREDUCE_ADD: in WidenVectorOperand() 4690 case ISD::VECREDUCE_ADD: in WidenVecOp_VECREDUCE()
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D | LegalizeIntegerTypes.cpp | 190 case ISD::VECREDUCE_ADD: in PromoteIntegerResult() 1313 case ISD::VECREDUCE_ADD: in PromoteIntegerOperand() 1736 case ISD::VECREDUCE_ADD: in PromoteIntOp_VECREDUCE() 1919 case ISD::VECREDUCE_ADD: in ExpandIntegerResult()
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D | LegalizeDAG.cpp | 1150 case ISD::VECREDUCE_ADD: in LegalizeOp() 3799 case ISD::VECREDUCE_ADD: in ExpandNode()
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D | TargetLowering.cpp | 7613 case ISD::VECREDUCE_ADD: BaseOpcode = ISD::ADD; break; in expandVecReduce()
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D | SelectionDAGBuilder.cpp | 8981 Res = DAG.getNode(ISD::VECREDUCE_ADD, dl, VT, Op1); in visitVectorReduce()
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D | DAGCombiner.cpp | 1615 case ISD::VECREDUCE_ADD: in visit()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 714 setOperationAction(ISD::VECREDUCE_ADD, VT, Expand); in initActions()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 427 def vecreduce_add : SDNode<"ISD::VECREDUCE_ADD", SDTVecReduce>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 783 setOperationAction(ISD::VECREDUCE_ADD, VT, Custom); in AArch64TargetLowering() 3268 case ISD::VECREDUCE_ADD: in LowerOperation() 8547 case ISD::VECREDUCE_ADD: in LowerVECREDUCE() 12932 case ISD::VECREDUCE_ADD: in ReplaceNodeResults()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenFastISel.inc | 2658 // FastEmit functions for ISD::VECREDUCE_ADD. 2780 case ISD::VECREDUCE_ADD: return fastEmit_ISD_VECREDUCE_ADD_r(VT, RetVT, Op0, Op0IsKill);
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D | ARMGenDAGISel.inc | 5529 /* 11286*/ OPC_CheckOpcode, TARGET_VAL(ISD::VECREDUCE_ADD), 5750 /* 11758*/ OPC_CheckOpcode, TARGET_VAL(ISD::VECREDUCE_ADD), 50670 /*109615*/ /*SwitchOpcode*/ 65, TARGET_VAL(ISD::VECREDUCE_ADD),// ->109683
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 290 setOperationAction(ISD::VECREDUCE_ADD, VT, Legal); in addMVEVectorTypes()
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