Searched refs:VGPU10_OPERAND_4_COMPONENT_MASK_X (Results 1 – 2 of 2) sorted by relevance
641 #define VGPU10_OPERAND_4_COMPONENT_MASK_X 0x1 macro646 #define VGPU10_OPERAND_4_COMPONENT_MASK_XY (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…647 #define VGPU10_OPERAND_4_COMPONENT_MASK_XZ (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…648 #define VGPU10_OPERAND_4_COMPONENT_MASK_XW (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
1497 STATIC_ASSERT(TGSI_WRITEMASK_X == VGPU10_OPERAND_4_COMPONENT_MASK_X); in emit_dst_register()4245 writemask |= (VGPU10_OPERAND_4_COMPONENT_MASK_X << i); in output_writemask_for_stream()4318 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4326 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4392 operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_tesslevel_declaration()4404 sgnName, VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_tesslevel_declaration()4659 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4673 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4688 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()5063 mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_fs_input_declarations()[all …]