| /third_party/mesa3d/src/mesa/main/ |
| D | ffvertex_prog.c | 654 emit_op2(p, OPCODE_DP4, dest, WRITEMASK_X, src, mat[0]); in emit_matrix_transform_vec4()
692 emit_op2(p, OPCODE_DP3, dest, WRITEMASK_X, src, mat[0]); in emit_matrix_transform_vec3()
703 emit_op2(p, OPCODE_DP3, tmp, WRITEMASK_X, src, src); in emit_normalize_vec3()
704 emit_op1(p, OPCODE_RSQ, tmp, WRITEMASK_X, tmp); in emit_normalize_vec3()
1232 emit_op2(p, OPCODE_DP3, dots, WRITEMASK_X, normal, VPpli); in build_lighting()
1397 emit_op2(p, OPCODE_DP3, tmp, WRITEMASK_X, input, input); in build_fog()
1398 emit_op1(p, OPCODE_RSQ, tmp, WRITEMASK_X, tmp); in build_fog()
1399 emit_op1(p, OPCODE_RCP, fog, WRITEMASK_X, tmp); in build_fog()
1404 emit_op1(p, OPCODE_MOV, fog, WRITEMASK_X, input); in build_fog()
1408 emit_op1(p, OPCODE_ABS, fog, WRITEMASK_X, input); in build_fog()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | test_vec4_cmod_propagation.cpp | 163 dest_null.writemask = WRITEMASK_X; in TEST_F()
427 dest_null.writemask = WRITEMASK_X; in TEST_F()
470 dest_null.writemask = WRITEMASK_X; in TEST_F()
502 dest_null.writemask = WRITEMASK_X; in TEST_F()
641 dest.writemask = WRITEMASK_X; in TEST_F()
678 dest.writemask = WRITEMASK_X; in TEST_F()
688 dest_null.writemask = WRITEMASK_X; in TEST_F()
763 dest.writemask = WRITEMASK_X; in TEST_F()
771 dest_null.writemask = WRITEMASK_X; in TEST_F()
920 dest_null.writemask = WRITEMASK_X; in TEST_F()
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| D | brw_vec4_cmod_propagation.cpp | 42 return (earlier->dst.writemask != WRITEMASK_X && in writemasks_incompatible()
164 scan_inst->dst.writemask == WRITEMASK_X) || in opt_cmod_propagation_local()
205 case WRITEMASK_X: in opt_cmod_propagation_local()
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| D | test_vec4_register_coalesce.cpp | 145 m0.writemask = WRITEMASK_X; in TEST_F()
164 m0.writemask = WRITEMASK_X; in TEST_F()
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| D | brw_vec4_nir.cpp | 319 ubld.MOV(writemask(offset(tmp, 8, n), WRITEMASK_X), brw_imm_ud(di.i1)); in setup_imm_df()
445 int writemask = WRITEMASK_X; in nir_emit_intrinsic()
1599 tmp1.writemask = WRITEMASK_X; in nir_emit_alu()
1604 tmp2.writemask = WRITEMASK_X; in nir_emit_alu()
1858 case WRITEMASK_X: in nir_emit_alu()
2153 int writemask = devinfo->ver == 4 ? WRITEMASK_W : WRITEMASK_X; in nir_emit_texture()
2157 inst->dst.writemask = WRITEMASK_X; in nir_emit_texture()
2177 WRITEMASK_X), in nir_emit_texture()
2192 writemask = WRITEMASK_X; in nir_emit_texture()
2208 emit(MOV(dst_reg(MRF, param_base + 1, sample_index.type, WRITEMASK_X), in nir_emit_texture()
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| D | test_vec4_dead_code_eliminate.cpp | 159 test_mov->dst.writemask = WRITEMASK_X; in TEST_F()
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| D | brw_vec4_surface_builder.cpp | 196 bld.MOV(writemask(srcs, WRITEMASK_X), in emit_untyped_atomic()
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| D | brw_vec4_cse.cpp | 117 const uint32_t mask = ((ab_writemask & WRITEMASK_X) ? 0x000000ff : 0) | in operands_match()
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| D | brw_reg.h | 524 WRITEMASK_X); in brw_vec1_reg()
875 WRITEMASK_X); in brw_notification_reg()
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| D | brw_vec4_builder.h | 352 writemask(vgrf(BRW_REGISTER_TYPE_UD), WRITEMASK_X); in emit_uniformize()
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| D | brw_vec4_visitor.cpp | 460 tmp_dst.writemask = WRITEMASK_X; in emit_unpack_half_2x16()
1182 if (inst->dst.writemask & WRITEMASK_X) in emit_scratch_write()
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| D | brw_eu_emit.c | 3169 const unsigned mask = align1 ? WRITEMASK_XYZW : WRITEMASK_X; in brw_untyped_atomic()
3219 const unsigned mask = !has_simd4x2 && !align1 ? WRITEMASK_X : WRITEMASK_XYZW; in brw_untyped_surface_write()
3436 brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X), in brw_find_live_channel()
3439 inst = brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X), in brw_find_live_channel()
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| D | brw_compile_sf.c | 649 brw_MOV(p, brw_writemask(c->m1Cx, WRITEMASK_X), c->tmp); in brw_emit_point_sprite_setup()
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| D | brw_vec4.cpp | 472 if ((inst->dst.writemask & WRITEMASK_X) != 0) in opt_vector_float()
2060 case WRITEMASK_X: in scalarize_predicate()
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| /third_party/mesa3d/src/mesa/program/ |
| D | programopt.c | 92 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i); in insert_mvp_dp4_code()
321 inst->DstReg.WriteMask = WRITEMASK_X; in _mesa_append_fog_code()
342 inst->DstReg.WriteMask = WRITEMASK_X; in _mesa_append_fog_code()
356 inst->DstReg.WriteMask = WRITEMASK_X; in _mesa_append_fog_code()
369 inst->DstReg.WriteMask = WRITEMASK_X; in _mesa_append_fog_code()
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| D | program_lexer.l | 90 return WRITEMASK_X; in mask_from_char()
362 yylval->swiz_mask.mask = WRITEMASK_X
419 yylval->swiz_mask.mask = WRITEMASK_X
449 yylval->swiz_mask.mask = WRITEMASK_X;
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| D | prog_instruction.h | 76 #define WRITEMASK_X 0x1 macro
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| D | prog_to_nir.c | 302 ptn_move_dest_masked(b, dest, nir_fexp2(b, nir_ffloor(b, srcx)), WRITEMASK_X); in ptn_exp()
321 ptn_move_dest_masked(b, dest, floor_log2, WRITEMASK_X); in ptn_log()
339 ptn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), WRITEMASK_X); in ptn_dst()
386 WRITEMASK_X); in ptn_scs()
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| D | prog_print.c | 501 if (writeMask & WRITEMASK_X) in _mesa_writemask_string()
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| D | program_parse.y | 947 if ($1.mask != WRITEMASK_X) {
958 if ($1.mask != WRITEMASK_X) {
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| /third_party/mesa3d/src/compiler/glsl/ |
| D | lower_packing_builtins.cpp | 288 factory.emit(assign(u2, bit_and(u, constant(0xffffu)), WRITEMASK_X)); in unpack_uint_to_uvec2()
322 WRITEMASK_X)); in unpack_uint_to_ivec2()
351 factory.emit(assign(u4, bit_and(u, constant(0xffu)), WRITEMASK_X)); in unpack_uint_to_uvec4()
403 WRITEMASK_X)); in unpack_uint_to_ivec4()
1057 WRITEMASK_X)); in lower_pack_half_2x16()
1277 WRITEMASK_X)); in lower_unpack_half_2x16()
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| D | ir_builder.h | 31 #ifndef WRITEMASK_X
33 WRITEMASK_X = 0x1, enumerator
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| D | lower_vector_insert.cpp | 147 assign(temp, src_temp, WRITEMASK_X << i))); in handle_rvalue()
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| D | lower_vector_derefs.cpp | 119 WRITEMASK_X << i))); in visit_enter()
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| /third_party/mesa3d/src/intel/tools/ |
| D | i965_gram.y | 1736 WRITEMASK_X);
1765 WRITEMASK_X);
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