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Searched refs:addImm (Results 1 – 25 of 206) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZAsmPrinter.cpp37 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
42 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
51 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
56 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
66 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
67 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
68 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
112 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorLoad()
122 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorStore()
124 .addImm(0); in lowerSubvectorStore()
[all …]
DSystemZInstrInfo.cpp229 .addImm(32); in expandLoadStackGuard()
237 MachineInstrBuilder(MF, MI).addReg(Reg64).addImm(40).addReg(0); in expandLoadStackGuard()
269 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate); in emitGRX32Move()
505 .addImm(CCValid).addImm(CCMask).addMBB(TBB); in insertBranch()
605 .addImm(CCValid).addImm(CCMask); in insertSelect()
728 .addImm(CCValid).addImm(CCMask) in PredicateInstruction()
735 .addImm(CCValid).addImm(CCMask) in PredicateInstruction()
746 .addImm(CCValid) in PredicateInstruction()
747 .addImm(CCMask) in PredicateInstruction()
758 .addImm(CCValid).addImm(CCMask) in PredicateInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp110 .addImm(Offset) in buildPrologSpill()
111 .addImm(0) // glc in buildPrologSpill()
112 .addImm(0) // slc in buildPrologSpill()
113 .addImm(0) // tfe in buildPrologSpill()
114 .addImm(0) // dlc in buildPrologSpill()
115 .addImm(0) // swz in buildPrologSpill()
124 .addImm(Offset); in buildPrologSpill()
131 .addImm(0) in buildPrologSpill()
132 .addImm(0) // glc in buildPrologSpill()
133 .addImm(0) // slc in buildPrologSpill()
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DR600ControlFlowFinalizer.cpp354 .addImm(0) // ADDR in MakeFetchClause()
355 .addImm(AluInstCount - 1); // COUNT in MakeFetchClause()
403 .addImm(LiteralPair0) in insertLiterals()
404 .addImm(LiteralPair1); in insertLiterals()
446 MILit.addImm(Literals[i]->getImm()); in MakeALUClause()
453 MILit.addImm(Literals[i + 1]->getImm()); in MakeALUClause()
459 MILit.addImm(0); in MakeALUClause()
473 BuildMI(BB, DL, TII->get(R600::FETCH_CLAUSE)).addImm(CfCount); in EmitFetchClause()
485 BuildMI(BB, DL, TII->get(R600::ALU_CLAUSE)).addImm(CfCount); in EmitALUClause()
555 .addImm(CfCount + 1) in runOnMachineFunction()
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DAMDGPUInstructionSelector.cpp127 .addImm(1) in selectCOPY()
130 .addImm(0) in selectCOPY()
330 .addImm(0); in selectG_ADD_SUB()
364 .addImm(0); in selectG_ADD_SUB()
370 .addImm(0); in selectG_ADD_SUB()
378 .addImm(AMDGPU::sub0) in selectG_ADD_SUB()
380 .addImm(AMDGPU::sub1); in selectG_ADD_SUB()
509 MIB.addImm(SubRegs[I]); in selectG_MERGE_VALUES()
632 .addImm(SubReg); in selectG_INSERT()
790 .addImm(Tgt) in buildEXP()
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DSILoadStoreOptimizer.cpp994 .addImm(CI.BaseOff); in mergeRead2Pair()
1002 .addImm(0); // clamp bit in mergeRead2Pair()
1009 .addImm(NewOffset0) // offset0 in mergeRead2Pair()
1010 .addImm(NewOffset1) // offset1 in mergeRead2Pair()
1011 .addImm(0) // gds in mergeRead2Pair()
1087 .addImm(CI.BaseOff); in mergeWrite2Pair()
1095 .addImm(0); // clamp bit in mergeWrite2Pair()
1104 .addImm(NewOffset0) // offset0 in mergeWrite2Pair()
1105 .addImm(NewOffset1) // offset1 in mergeWrite2Pair()
1106 .addImm(0) // gds in mergeWrite2Pair()
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DR600EmitClauseMarkers.cpp297 .addImm(Address++) // ADDR in MakeALUClause()
298 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].first) // KB0 in MakeALUClause()
299 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].first) // KB1 in MakeALUClause()
300 .addImm(KCacheBanks.empty()?0:2) // KM0 in MakeALUClause()
301 .addImm((KCacheBanks.size() < 2)?0:2) // KM1 in MakeALUClause()
302 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].second) // KLINE0 in MakeALUClause()
303 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].second) // KLINE1 in MakeALUClause()
304 .addImm(AluInstCount) // COUNT in MakeALUClause()
305 .addImm(1); // Enabled in MakeALUClause()
DSIRegisterInfo.cpp367 .addImm(Offset); in materializeFrameBaseRegister()
374 .addImm(0); // clamp bit in materializeFrameBaseRegister()
599 .addImm(Offset) in buildMUBUFOffsetLoadStore()
600 .addImm(0) // glc in buildMUBUFOffsetLoadStore()
601 .addImm(0) // slc in buildMUBUFOffsetLoadStore()
602 .addImm(0) // tfe in buildMUBUFOffsetLoadStore()
603 .addImm(0) // dlc in buildMUBUFOffsetLoadStore()
604 .addImm(0) // swz in buildMUBUFOffsetLoadStore()
681 .addImm(Offset); in buildSpillLoadStore()
719 .addImm(Offset) in buildSpillLoadStore()
[all …]
DSIInstrInfo.cpp552 .addImm(1) in copyPhysReg()
553 .addImm(0); in copyPhysReg()
565 .addImm(0) in copyPhysReg()
591 .addImm(0) in copyPhysReg()
612 .addImm(0); in copyPhysReg()
769 .addImm(Value); in materializeImmediate()
777 .addImm(Value); in materializeImmediate()
783 .addImm(Value); in materializeImmediate()
788 .addImm(Value); in materializeImmediate()
810 Builder.addImm(IdxValue); in materializeImmediate()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMAsmPrinter.cpp177 .addImm(ARMCC::AL) in runOnMachineFunction()
1006 .addImm(ARMCC::AL) in EmitJumpTableInsts()
1288 .addImm(MI->getOperand(2).getImm()) in EmitInstruction()
1304 .addImm(MI->getOperand(2).getImm()) in EmitInstruction()
1315 .addImm(ARMCC::AL) in EmitInstruction()
1352 .addImm(ARMCC::AL).addReg(0) in EmitInstruction()
1361 .addImm(ARMCC::AL) in EmitInstruction()
1370 .addImm(ARMCC::AL) in EmitInstruction()
1381 .addImm(ARMCC::AL) in EmitInstruction()
1394 .addImm(ARMCC::AL) in EmitInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEFrameLowering.cpp53 .addImm(0) in emitPrologueInsns()
57 .addImm(8) in emitPrologueInsns()
61 .addImm(24) in emitPrologueInsns()
65 .addImm(32) in emitPrologueInsns()
69 .addImm(0); in emitPrologueInsns()
91 .addImm(0); in emitEpilogueInsns()
94 .addImm(32); in emitEpilogueInsns()
97 .addImm(24); in emitEpilogueInsns()
100 .addImm(8); in emitEpilogueInsns()
103 .addImm(0); in emitEpilogueInsns()
[all …]
DVEInstrInfo.cpp95 .addImm(VECC::CC_IGE) in expandExtendStackPseudo()
107 .addImm(0x18); in expandExtendStackPseudo()
110 .addImm(0); in expandExtendStackPseudo()
112 .addImm(0x13b); in expandExtendStackPseudo()
115 .addImm(0) in expandExtendStackPseudo()
119 .addImm(8) in expandExtendStackPseudo()
123 .addImm(16) in expandExtendStackPseudo()
129 .addImm(0); in expandExtendStackPseudo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrBuilder.h127 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0); in addDirectMem()
144 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0); in addOffset()
149 return MIB.addImm(1).addReg(0).add(Offset).addReg(0); in addOffset()
167 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) in addRegReg()
168 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); in addRegReg()
183 MIB.addImm(AM.Scale).addReg(AM.IndexReg); in addFullAddress()
187 MIB.addImm(AM.Disp); in addFullAddress()
226 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0) in addConstantPoolReference()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64AsmPrinter.cpp301 EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::B).addImm(8)); in EmitSled()
304 EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0)); in EmitSled()
374 .addImm(4) in EmitHwasanMemaccessSymbols()
375 .addImm(55), in EmitHwasanMemaccessSymbols()
381 .addImm(0) in EmitHwasanMemaccessSymbols()
382 .addImm(0), in EmitHwasanMemaccessSymbols()
389 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)), in EmitHwasanMemaccessSymbols()
394 .addImm(AArch64CC::NE) in EmitHwasanMemaccessSymbols()
408 .addImm(15) in EmitHwasanMemaccessSymbols()
409 .addImm(0), in EmitHwasanMemaccessSymbols()
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DAArch64SpeculationHardening.cpp221 BuildMI(MBB, MBBI, DL, TII->get(AArch64::DSB)).addImm(0xf); in insertFullSpeculationBarrier()
222 BuildMI(MBB, MBBI, DL, TII->get(AArch64::ISB)).addImm(0xf); in insertFullSpeculationBarrier()
235 .addImm(CondCode); in insertTrackingCode()
372 .addImm(0) in insertSPToRegTaintPropagation()
373 .addImm(0); // no shift in insertSPToRegTaintPropagation()
379 .addImm(AArch64CC::EQ); in insertSPToRegTaintPropagation()
395 .addImm(0) in insertRegToSPTaintPropagation()
396 .addImm(0); // no shift in insertRegToSPTaintPropagation()
402 .addImm(0); in insertRegToSPTaintPropagation()
407 .addImm(0) in insertRegToSPTaintPropagation()
[all …]
DAArch64ExpandPseudoInsts.cpp140 .addImm(I->Op2)); in expandMOVImm()
151 .addImm(I->Op1) in expandMOVImm()
152 .addImm(I->Op2)); in expandMOVImm()
164 .addImm(I->Op1) in expandMOVImm()
165 .addImm(I->Op2)); in expandMOVImm()
206 .addImm(0).addImm(0); in expandCMP_SWAP()
212 .addImm(ExtendImm); in expandCMP_SWAP()
214 .addImm(AArch64CC::NE) in expandCMP_SWAP()
293 .addImm(0); in expandCMP_SWAP_128()
297 .addImm(AArch64CC::EQ); in expandCMP_SWAP_128()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp80 .addImm(I * Alignment); in expandMEMCPY()
83 .addImm(I * Alignment); in expandMEMCPY()
93 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
100 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
107 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
137 .addImm(0); in storeRegToStackSlot()
142 .addImm(0); in storeRegToStackSlot()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiFrameLowering.cpp80 .addImm(MaxCallFrameSize); in replaceAdjDynAllocPseudo()
116 .addImm(-4) in emitPrologue()
117 .addImm(LPAC::makePreOp(LPAC::ADD)) in emitPrologue()
124 .addImm(8) in emitPrologue()
132 .addImm(StackSize) in emitPrologue()
188 .addImm(0); in emitEpilogue()
193 .addImm(-8) in emitEpilogue()
194 .addImm(LPAC::ADD); in emitEpilogue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp388 .addImm(UsedRegMask); in HandleVRSaveUpdate()
392 .addImm(UsedRegMask); in HandleVRSaveUpdate()
397 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
401 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
406 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
410 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
414 .addImm(UsedRegMask & 0xFFFF); in HandleVRSaveUpdate()
982 .addImm(getCRSaveOffset()) in emitPrologue()
1011 .addImm(FPOffset) in emitPrologue()
1016 .addImm(PBPOffset) in emitPrologue()
[all …]
DPPCRegisterInfo.cpp535 .addImm(FrameSize); in lowerDynamicAlloc()
539 .addImm(FrameSize); in lowerDynamicAlloc()
542 .addImm(0) in lowerDynamicAlloc()
546 .addImm(0) in lowerDynamicAlloc()
563 .addImm(~(MaxAlign-1)); in lowerDynamicAlloc()
579 .addImm(maxCallFrameSize); in lowerDynamicAlloc()
588 .addImm(~(MaxAlign-1)); in lowerDynamicAlloc()
604 .addImm(maxCallFrameSize); in lowerDynamicAlloc()
630 .addImm(maxCallFrameSize); in lowerDynamicAreaOffset()
674 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling()
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DPPCBranchSelector.cpp342 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2); in runOnMachineFunction()
345 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2); in runOnMachineFunction()
348 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2); in runOnMachineFunction()
350 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2); in runOnMachineFunction()
352 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2); in runOnMachineFunction()
354 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2); in runOnMachineFunction()
356 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.cpp263 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in insertBranch()
265 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in insertBranch()
410 BuildMI(MBB, I, DL, get(SP::STXri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
413 BuildMI(MBB, I, DL, get(SP::STri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
416 BuildMI(MBB, I, DL, get(SP::STDri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
419 BuildMI(MBB, I, DL, get(SP::STFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
422 BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
427 BuildMI(MBB, I, DL, get(SP::STQFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
448 BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot()
451 BuildMI(MBB, I, DL, get(SP::LDri), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSplitDouble.cpp654 .addImm(Off); in splitMemRef()
657 .addImm(Off+4); in splitMemRef()
663 .addImm(Off) in splitMemRef()
667 .addImm(Off+4) in splitMemRef()
681 .addImm(Inc); in splitMemRef()
722 .addImm(int32_t(V & 0xFFFFFFFFULL)); in splitImmediate()
724 .addImm(int32_t(V >> 32)); in splitImmediate()
774 .addImm(31); in splitExt()
843 .addImm(S); in splitShift()
849 .addImm(S) in splitShift()
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DHexagonCopyToCombine.cpp660 .addImm(V); in emitConst64()
675 .addImm(LoOperand.getImm()); in emitCombineII()
680 .addImm(HiOperand.getImm()) in emitCombineII()
691 .addImm(LoOperand.getImm()); in emitCombineII()
696 .addImm(HiOperand.getImm()) in emitCombineII()
706 .addImm(LoOperand.getImm()); in emitCombineII()
711 .addImm(HiOperand.getImm()) in emitCombineII()
721 .addImm(LoOperand.getImm()); in emitCombineII()
726 .addImm(HiOperand.getImm()) in emitCombineII()
737 .addImm(HiOperand.getImm()) in emitCombineII()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRExpandPseudoInsts.cpp238 .addImm(Lo8); in expandLogicImm()
248 .addImm(Hi8); in expandLogicImm()
302 MIBLO.addImm(Imm & 0xff); in expand()
303 MIBHI.addImm((Imm >> 8) & 0xff); in expand()
343 .addImm(Lo8); in expand()
351 .addImm(Hi8); in expand()
523 MIBLO.addImm(Imm & 0xff); in expand()
524 MIBHI.addImm((Imm >> 8) & 0xff); in expand()
564 MIBLO.addImm(Imm); in expand()
565 MIBHI.addImm(Imm + 1); in expand()
[all …]

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