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Searched refs:align_u64 (Results 1 – 13 of 13) sorted by relevance

/third_party/mesa3d/src/intel/vulkan/
Danv_allocator.c1681 size = align_u64(size, 4096); in anv_device_alloc_bo()
1688 size = align_u64(size, 64 * 1024); in anv_device_alloc_bo()
1691 ccs_size = align_u64(DIV_ROUND_UP(size, INTEL_AUX_MAP_GFX12_CCS_SCALE), 4096); in anv_device_alloc_bo()
Danv_android.c551 align_u64(mem_reqs.memoryRequirements.size, in anv_image_init_from_gralloc()
Danv_cmd_buffer.c317 align_u64(brw_rt_ray_queries_shadow_stacks_size(&device->info, in anv_cmd_buffer_set_ray_query_buffer()
Danv_private.h311 align_u64(uint64_t v, uint64_t a) in align_u64() function
2608 bound->end = align_u64(bound->end, 64); in anv_gfx8_9_vb_cache_range_needs_workaround()
Danv_device.c3790 align_u64(pAllocateInfo->allocationSize, 4096); in anv_AllocateMemory()
4206 map_size = align_u64(map_size, 4096); in anv_MapMemory()
4463 pMemoryRequirements->memoryRequirements.size = align_u64(size, 4); in anv_get_buffer_memory_requirements()
Danv_descriptor_set.c1626 bind_range = align_u64(bind_range, ANV_UBO_ALIGNMENT); in anv_descriptor_set_write_buffer()
Danv_image.c129 offset = align_u64(container->offset + container->size, alignment); in image_binding_grow()
DgenX_cmd_buffer.c590 end_offset_B = align_u64(end_offset_B, 64 * 1024); in anv_image_init_aux_tt()
/third_party/mesa3d/docs/relnotes/
D20.0.5.rst124 - anv/image: Use align_u64 for image offsets
D20.1.0.rst2431 - anv/image: Use align_u64 for image offsets
/third_party/mesa3d/src/amd/vulkan/
Dradv_descriptor_set.c440 if (size && !align_u64(size, descriptor_alignment)) { in radv_GetDescriptorSetLayoutSupport()
443 size = align_u64(size, descriptor_alignment); in radv_GetDescriptorSetLayoutSupport()
Dradv_private.h147 align_u64(uint64_t v, uint64_t a) in align_u64() function
Dradv_device.c5568 uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096); in radv_alloc_memory()