| /third_party/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_batch.c | 39 alloc_ring(struct fd_batch *batch, unsigned sz, enum fd_ringbuffer_flags flags) in alloc_ring() argument
41 struct fd_context *ctx = batch->ctx; in alloc_ring()
57 return fd_submit_new_ringbuffer(batch->submit, sz, flags); in alloc_ring()
61 batch_init(struct fd_batch *batch) in batch_init() argument
63 struct fd_context *ctx = batch->ctx; in batch_init()
65 batch->submit = fd_submit_new(ctx->pipe); in batch_init()
66 if (batch->nondraw) { in batch_init()
67 batch->gmem = alloc_ring(batch, 0x1000, FD_RINGBUFFER_PRIMARY); in batch_init()
68 batch->draw = alloc_ring(batch, 0x100000, 0); in batch_init()
70 batch->gmem = alloc_ring(batch, 0x100000, FD_RINGBUFFER_PRIMARY); in batch_init()
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| D | freedreno_draw.c | 46 resource_read(struct fd_batch *batch, struct pipe_resource *prsc) assert_dt in resource_read() argument
50 fd_batch_resource_read(batch, fd_resource(prsc)); in resource_read()
54 resource_written(struct fd_batch *batch, struct pipe_resource *prsc) assert_dt in resource_written() argument
58 fd_batch_resource_write(batch, fd_resource(prsc)); in resource_written()
62 batch_draw_tracking_for_dirty_bits(struct fd_batch *batch) assert_dt in batch_draw_tracking_for_dirty_bits() argument
64 struct fd_context *ctx = batch->ctx; in batch_draw_tracking_for_dirty_bits()
65 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in batch_draw_tracking_for_dirty_bits()
78 batch->invalidated |= FD_BUFFER_DEPTH; in batch_draw_tracking_for_dirty_bits()
80 batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED; in batch_draw_tracking_for_dirty_bits()
83 resource_written(batch, pfb->zsbuf->texture); in batch_draw_tracking_for_dirty_bits()
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| D | freedreno_query_hw.c | 42 get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring, in get_sample() argument
45 struct fd_context *ctx = batch->ctx; in get_sample()
51 if (!batch->sample_cache[idx]) { in get_sample()
53 ctx->hw_sample_providers[idx]->get_sample(batch, ring); in get_sample()
54 fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp); in get_sample()
55 util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp); in get_sample()
56 fd_batch_needs_flush(batch); in get_sample()
59 fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]); in get_sample()
65 clear_sample_cache(struct fd_batch *batch) in clear_sample_cache() argument
69 for (i = 0; i < ARRAY_SIZE(batch->sample_cache); i++) in clear_sample_cache()
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| D | freedreno_batch.h | 262 void fd_batch_reset(struct fd_batch *batch) assert_dt;
263 void fd_batch_flush(struct fd_batch *batch) assert_dt;
264 void fd_batch_add_dep(struct fd_batch *batch, struct fd_batch *dep) assert_dt;
265 void fd_batch_resource_write(struct fd_batch *batch,
267 void fd_batch_resource_read_slowpath(struct fd_batch *batch,
269 void fd_batch_check_size(struct fd_batch *batch) assert_dt;
277 void __fd_batch_describe(char *buf, const struct fd_batch *batch) assert_dt;
278 void __fd_batch_destroy(struct fd_batch *batch);
296 fd_batch_reference_locked(struct fd_batch **ptr, struct fd_batch *batch) in fd_batch_reference_locked() argument
305 &(*ptr)->reference, &batch->reference, in fd_batch_reference_locked()
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| D | freedreno_gmem.c | 472 gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt) in gmem_key_init() argument
474 struct fd_screen *screen = batch->ctx->screen; in gmem_key_init()
475 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in gmem_key_init()
477 !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED | FD_GMEM_STENCIL_ENABLED | in gmem_key_init()
488 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL); in gmem_key_init()
489 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL); in gmem_key_init()
511 struct pipe_scissor_state *scissor = &batch->max_scissor; in gmem_key_init()
527 if (is_a20x(screen) && batch->cleared) { in gmem_key_init()
544 lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt) in lookup_gmem_state() argument
546 struct fd_screen *screen = batch->ctx->screen; in lookup_gmem_state()
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| D | freedreno_batch_cache.c | 155 struct fd_batch *batch; in fd_bc_flush() local
160 foreach_batch (batch, cache, cache->batch_mask) { in fd_bc_flush()
161 if (batch->ctx == ctx) { in fd_bc_flush()
162 fd_batch_reference_locked(&batches[n++], batch); in fd_bc_flush()
221 struct fd_batch *batch, *batches[32] = {}; in fd_bc_flush_readers() local
230 foreach_batch (batch, &ctx->screen->batch_cache, rsc->track->batch_mask) in fd_bc_flush_readers()
231 fd_batch_reference_locked(&batches[batch_count++], batch); in fd_bc_flush_readers()
256 struct fd_batch *batch = cache->batches[i]; in fd_bc_dump() local
257 if (batch) { in fd_bc_dump()
258 printf(" %p<%u>%s\n", batch, batch->seqno, in fd_bc_dump()
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| D | freedreno_autotune.c | 49 get_history(struct fd_autotune *at, struct fd_batch *batch) in get_history() argument
54 assert(batch->key || batch->nondraw); in get_history()
55 if (!batch->key) in get_history()
59 _mesa_hash_table_search_pre_hashed(at->ht, batch->hash, batch->key); in get_history()
68 history->key = fd_batch_key_clone(history, batch->key); in get_history()
83 _mesa_hash_table_insert_pre_hashed(at->ht, batch->hash, history->key, in get_history()
156 fallback_use_bypass(struct fd_batch *batch) in fallback_use_bypass() argument
158 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fallback_use_bypass()
161 if (batch->cleared || batch->gmem_reason || in fallback_use_bypass()
162 (batch->num_draws > 5) || (pfb->samples > 1)) { in fallback_use_bypass()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_batch.c | 71 static void crocus_batch_reset(struct crocus_batch *batch);
74 num_fences(struct crocus_batch *batch) in num_fences() argument
76 return util_dynarray_num_elements(&batch->exec_fences, in num_fences()
84 dump_fence_list(struct crocus_batch *batch) in dump_fence_list() argument
86 fprintf(stderr, "Fence list (length %u): ", num_fences(batch)); in dump_fence_list()
88 util_dynarray_foreach(&batch->exec_fences, in dump_fence_list()
103 dump_validation_list(struct crocus_batch *batch) in dump_validation_list() argument
105 fprintf(stderr, "Validation list (length %d):\n", batch->exec_count); in dump_validation_list()
107 for (int i = 0; i < batch->exec_count; i++) { in dump_validation_list()
108 uint64_t flags = batch->validation_list[i].flags; in dump_validation_list()
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| D | crocus_batch.h | 179 batch_has_fine_fence(struct crocus_batch *batch) in batch_has_fine_fence() argument
181 return !!batch->fine_fences.uploader; in batch_has_fine_fence()
184 #define BATCH_HAS_FINE_FENCES(batch) (!!(batch)->fine_fences.uploader) argument
188 void crocus_batch_free(struct crocus_batch *batch);
189 void crocus_batch_maybe_flush(struct crocus_batch *batch, unsigned estimate);
191 void _crocus_batch_flush(struct crocus_batch *batch, const char *file, int line);
192 #define crocus_batch_flush(batch) _crocus_batch_flush((batch), __FILE__, __LINE__) argument
194 bool crocus_batch_references(struct crocus_batch *batch, struct crocus_bo *bo);
196 bool crocus_batch_prepare_noop(struct crocus_batch *batch, bool noop_enable);
203 void crocus_use_pinned_bo(struct crocus_batch *batch, struct crocus_bo *bo,
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| D | crocus_blorp.c | 53 stream_state(struct crocus_batch *batch, in stream_state() argument
59 uint32_t offset = ALIGN(batch->state.used, alignment); in stream_state()
61 if (offset + size >= STATE_SZ && !batch->no_wrap) { in stream_state()
62 crocus_batch_flush(batch); in stream_state()
63 offset = ALIGN(batch->state.used, alignment); in stream_state()
64 } else if (offset + size >= batch->state.bo->size) { in stream_state()
66 MIN2(batch->state.bo->size + batch->state.bo->size / 2, in stream_state()
68 crocus_grow_buffer(batch, true, batch->state.used, new_size); in stream_state()
69 assert(offset + size < batch->state.bo->size); in stream_state()
72 crocus_record_state_size(batch->state_sizes, offset, size); in stream_state()
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| D | crocus_pipe_control.c | 58 crocus_emit_pipe_control_flush(struct crocus_batch *batch, in crocus_emit_pipe_control_flush() argument
62 const struct intel_device_info *devinfo = &batch->screen->devinfo; in crocus_emit_pipe_control_flush()
78 crocus_emit_end_of_pipe_sync(batch, reason, in crocus_emit_pipe_control_flush()
83 batch->screen->vtbl.emit_raw_pipe_control(batch, reason, flags, NULL, 0, 0); in crocus_emit_pipe_control_flush()
95 crocus_emit_pipe_control_write(struct crocus_batch *batch, in crocus_emit_pipe_control_write() argument
100 batch->screen->vtbl.emit_raw_pipe_control(batch, reason, flags, bo, offset, imm); in crocus_emit_pipe_control_write()
116 crocus_emit_depth_stall_flushes(struct crocus_batch *batch) in crocus_emit_depth_stall_flushes() argument
118 UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo; in crocus_emit_depth_stall_flushes()
130 crocus_emit_pipe_control_flush(batch, "depth stall", PIPE_CONTROL_DEPTH_STALL); in crocus_emit_depth_stall_flushes()
131 crocus_emit_pipe_control_flush(batch, "depth stall", PIPE_CONTROL_DEPTH_CACHE_FLUSH); in crocus_emit_depth_stall_flushes()
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| D | crocus_fine_fence.c | 6 crocus_fine_fence_reset(struct crocus_batch *batch) in crocus_fine_fence_reset() argument
8 u_upload_alloc(batch->fine_fences.uploader, in crocus_fine_fence_reset()
10 &batch->fine_fences.ref.offset, &batch->fine_fences.ref.res, in crocus_fine_fence_reset()
11 (void **)&batch->fine_fences.map); in crocus_fine_fence_reset()
12 WRITE_ONCE(*batch->fine_fences.map, 0); in crocus_fine_fence_reset()
13 batch->fine_fences.next++; in crocus_fine_fence_reset()
17 crocus_fine_fence_init(struct crocus_batch *batch) in crocus_fine_fence_init() argument
19 batch->fine_fences.ref.res = NULL; in crocus_fine_fence_init()
20 batch->fine_fences.next = 0; in crocus_fine_fence_init()
21 if (batch_has_fine_fence(batch)) in crocus_fine_fence_init()
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| D | iris_batch.c | 70 iris_batch_reset(struct iris_batch *batch);
73 num_fences(struct iris_batch *batch) in num_fences() argument
75 return util_dynarray_num_elements(&batch->exec_fences, in num_fences()
83 dump_fence_list(struct iris_batch *batch) in dump_fence_list() argument
85 fprintf(stderr, "Fence list (length %u): ", num_fences(batch)); in dump_fence_list()
87 util_dynarray_foreach(&batch->exec_fences, in dump_fence_list()
102 dump_bo_list(struct iris_batch *batch) in dump_bo_list() argument
104 fprintf(stderr, "BO list (length %d):\n", batch->exec_count); in dump_bo_list()
106 for (int i = 0; i < batch->exec_count; i++) { in dump_bo_list()
107 struct iris_bo *bo = batch->exec_bos[i]; in dump_bo_list()
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| D | iris_batch.h | 204 void iris_chain_to_new_batch(struct iris_batch *batch);
206 void iris_batch_maybe_flush(struct iris_batch *batch, unsigned estimate);
208 void _iris_batch_flush(struct iris_batch *batch, const char *file, int line);
209 #define iris_batch_flush(batch) _iris_batch_flush((batch), __FILE__, __LINE__) argument
211 bool iris_batch_references(struct iris_batch *batch, struct iris_bo *bo);
213 bool iris_batch_prepare_noop(struct iris_batch *batch, bool noop_enable);
217 void iris_use_pinned_bo(struct iris_batch *batch, struct iris_bo *bo,
220 enum pipe_reset_status iris_batch_check_for_reset(struct iris_batch *batch);
223 iris_batch_bytes_used(struct iris_batch *batch) in iris_batch_bytes_used() argument
225 return batch->map_next - batch->map; in iris_batch_bytes_used()
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| D | iris_blorp.c | 49 stream_state(struct iris_batch *batch, in stream_state() argument
62 iris_use_pinned_bo(batch, bo, false, IRIS_DOMAIN_NONE); in stream_state()
64 iris_record_state_size(batch->state_sizes, in stream_state()
84 struct iris_batch *batch = blorp_batch->driver_batch; in blorp_emit_dwords() local
85 return iris_get_command_space(batch, n * sizeof(uint32_t)); in blorp_emit_dwords()
92 struct iris_batch *batch = blorp_batch->driver_batch; in combine_and_pin_address() local
95 iris_use_pinned_bo(batch, bo, addr.reloc_flags & RELOC_WRITE, in combine_and_pin_address()
136 struct iris_batch *batch = blorp_batch->driver_batch; in blorp_alloc_dynamic_state() local
138 return stream_state(batch, ice->state.dynamic_uploader, in blorp_alloc_dynamic_state()
163 struct iris_batch *batch = blorp_batch->driver_batch; in blorp_alloc_binding_table() local
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| D | iris_fine_fence.c | 6 iris_fine_fence_reset(struct iris_batch *batch) in iris_fine_fence_reset() argument
8 u_upload_alloc(batch->fine_fences.uploader, in iris_fine_fence_reset()
10 &batch->fine_fences.ref.offset, &batch->fine_fences.ref.res, in iris_fine_fence_reset()
11 (void **)&batch->fine_fences.map); in iris_fine_fence_reset()
12 WRITE_ONCE(*batch->fine_fences.map, 0); in iris_fine_fence_reset()
13 batch->fine_fences.next++; in iris_fine_fence_reset()
17 iris_fine_fence_init(struct iris_batch *batch) in iris_fine_fence_init() argument
19 batch->fine_fences.ref.res = NULL; in iris_fine_fence_init()
20 batch->fine_fences.next = 0; in iris_fine_fence_init()
21 iris_fine_fence_reset(batch); in iris_fine_fence_init()
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| /third_party/mesa3d/src/gallium/drivers/panfrost/ |
| D | pan_job.c | 46 panfrost_batch_idx(struct panfrost_batch *batch) in panfrost_batch_idx() argument
48 return batch - batch->ctx->batches.slots; in panfrost_batch_idx()
54 panfrost_batch_add_surface(struct panfrost_batch *batch, struct pipe_surface *surf) in panfrost_batch_add_surface() argument
58 panfrost_batch_write_rsrc(batch, rsrc, PIPE_SHADER_FRAGMENT); in panfrost_batch_add_surface()
65 struct panfrost_batch *batch) in panfrost_batch_init() argument
71 batch->ctx = ctx; in panfrost_batch_init()
73 batch->seqnum = ++ctx->batches.seqnum; in panfrost_batch_init()
75 util_dynarray_init(&batch->bos, NULL); in panfrost_batch_init()
77 batch->minx = batch->miny = ~0; in panfrost_batch_init()
78 batch->maxx = batch->maxy = 0; in panfrost_batch_init()
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| D | pan_cmdstream.c | 289 panfrost_get_blend_shaders(struct panfrost_batch *batch, in panfrost_get_blend_shaders() argument
295 for (unsigned c = 0; c < batch->key.nr_cbufs; ++c) { in panfrost_get_blend_shaders()
296 if (batch->key.cbufs[c]) { in panfrost_get_blend_shaders()
297 blend_shaders[c] = panfrost_get_blend(batch, in panfrost_get_blend_shaders()
346 panfrost_emit_blend(struct panfrost_batch *batch, void *rts, mali_ptr *blend_shaders) in panfrost_emit_blend() argument
348 unsigned rt_count = batch->key.nr_cbufs; in panfrost_emit_blend()
349 struct panfrost_context *ctx = batch->ctx; in panfrost_emit_blend()
358 if (rt_count == 0 || !batch->key.cbufs[i] || so->info[i].no_colour) { in panfrost_emit_blend()
370 enum pipe_format format = batch->key.cbufs[i]->format; in panfrost_emit_blend()
473 panfrost_emit_compute_shader_meta(struct panfrost_batch *batch, enum pipe_shader_type stage) in panfrost_emit_compute_shader_meta() argument
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| /third_party/mesa3d/src/gallium/drivers/d3d12/ |
| D | d3d12_batch.cpp | 41 d3d12_init_batch(struct d3d12_context *ctx, struct d3d12_batch *batch) in d3d12_init_batch() argument
45 batch->bos = _mesa_hash_table_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
47 batch->sampler_views = _mesa_set_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
49 batch->surfaces = _mesa_set_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
51 batch->objects = _mesa_set_create(NULL, in d3d12_init_batch()
55 if (!batch->bos || !batch->sampler_views || !batch->surfaces || !batch->objects) in d3d12_init_batch()
58 util_dynarray_init(&batch->zombie_samplers, NULL); in d3d12_init_batch()
61 IID_PPV_ARGS(&batch->cmdalloc)))) in d3d12_init_batch()
65 batch->sampler_heap = in d3d12_init_batch()
71 batch->view_heap = in d3d12_init_batch()
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| /third_party/mesa3d/src/gallium/winsys/i915/drm/ |
| D | i915_drm_batchbuffer.c | 30 i915_drm_batchbuffer(struct i915_winsys_batchbuffer *batch) in i915_drm_batchbuffer() argument
32 return (struct i915_drm_batchbuffer *)batch; in i915_drm_batchbuffer()
36 i915_drm_batchbuffer_reset(struct i915_drm_batchbuffer *batch) in i915_drm_batchbuffer_reset() argument
38 struct i915_drm_winsys *idws = i915_drm_winsys(batch->base.iws); in i915_drm_batchbuffer_reset()
40 if (batch->bo) in i915_drm_batchbuffer_reset()
41 drm_intel_bo_unreference(batch->bo); in i915_drm_batchbuffer_reset()
42 batch->bo = drm_intel_bo_alloc(idws->gem_manager, in i915_drm_batchbuffer_reset()
44 batch->actual_size, in i915_drm_batchbuffer_reset()
47 memset(batch->base.map, 0, batch->actual_size); in i915_drm_batchbuffer_reset()
48 batch->base.ptr = batch->base.map; in i915_drm_batchbuffer_reset()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_gmem.c | 245 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
247 const struct fd_gmem_stateobj *gmem = batch->gmem_state; in use_hw_binning()
253 (batch->num_draws > 0); in use_hw_binning()
257 patch_fb_read_gmem(struct fd_batch *batch) in patch_fb_read_gmem() argument
259 unsigned num_patches = fd_patch_num_elements(&batch->fb_read_patches); in patch_fb_read_gmem()
263 struct fd_screen *screen = batch->ctx->screen; in patch_fb_read_gmem()
264 const struct fd_gmem_stateobj *gmem = batch->gmem_state; in patch_fb_read_gmem()
265 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in patch_fb_read_gmem()
286 struct fd_cs_patch *patch = fd_patch_element(&batch->fb_read_patches, i); in patch_fb_read_gmem()
294 util_dynarray_clear(&batch->fb_read_patches); in patch_fb_read_gmem()
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| /third_party/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 49 blorp_emit_dwords(struct blorp_batch *batch, unsigned n);
52 blorp_emit_reloc(struct blorp_batch *batch,
56 blorp_measure_start(struct blorp_batch *batch,
60 blorp_measure_end(struct blorp_batch *batch,
64 blorp_alloc_dynamic_state(struct blorp_batch *batch,
70 blorp_alloc_general_state(struct blorp_batch *batch,
76 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
79 blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
85 blorp_get_workaround_address(struct blorp_batch *batch);
88 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
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| /third_party/mesa3d/src/gallium/drivers/i915/ |
| D | i915_batchbuffer.h | 37 i915_winsys_batchbuffer_space(struct i915_winsys_batchbuffer *batch) in i915_winsys_batchbuffer_space() argument
39 return batch->size - (batch->ptr - batch->map); in i915_winsys_batchbuffer_space()
43 i915_winsys_batchbuffer_check(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_check() argument
46 return dwords * 4 <= i915_winsys_batchbuffer_space(batch); in i915_winsys_batchbuffer_check()
50 i915_winsys_batchbuffer_dword_unchecked(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_dword_unchecked() argument
53 *(unsigned *)batch->ptr = dword; in i915_winsys_batchbuffer_dword_unchecked()
54 batch->ptr += 4; in i915_winsys_batchbuffer_dword_unchecked()
58 i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch, float f) in i915_winsys_batchbuffer_float() argument
65 assert(i915_winsys_batchbuffer_space(batch) >= 4); in i915_winsys_batchbuffer_float()
66 i915_winsys_batchbuffer_dword_unchecked(batch, uif.ui); in i915_winsys_batchbuffer_float()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_gmem.c | 262 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
264 const struct fd_gmem_stateobj *gmem = batch->gmem_state; in use_hw_binning()
281 (batch->num_draws > 0); in use_hw_binning()
285 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) in patch_draws() argument
288 for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { in patch_draws()
289 struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); in patch_draws()
292 util_dynarray_clear(&batch->draw_patches); in patch_draws()
296 update_vsc_pipe(struct fd_batch *batch) assert_dt in update_vsc_pipe() argument
298 struct fd_context *ctx = batch->ctx; in update_vsc_pipe()
300 const struct fd_gmem_stateobj *gmem = batch->gmem_state; in update_vsc_pipe()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | genX_gpu_memcpy.c | 55 emit_common_so_memcpy(struct anv_batch *batch, struct anv_device *device, in emit_common_so_memcpy() argument
59 anv_batch_emit(batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_common_so_memcpy()
63 anv_batch_emit(batch, GENX(3DSTATE_VF_SGVS), sgvs); in emit_common_so_memcpy()
67 anv_batch_emit(batch, GENX(3DSTATE_VS), vs); in emit_common_so_memcpy()
68 anv_batch_emit(batch, GENX(3DSTATE_HS), hs); in emit_common_so_memcpy()
69 anv_batch_emit(batch, GENX(3DSTATE_TE), te); in emit_common_so_memcpy()
70 anv_batch_emit(batch, GENX(3DSTATE_DS), DS); in emit_common_so_memcpy()
71 anv_batch_emit(batch, GENX(3DSTATE_GS), gs); in emit_common_so_memcpy()
72 anv_batch_emit(batch, GENX(3DSTATE_PS), gs); in emit_common_so_memcpy()
74 anv_batch_emit(batch, GENX(3DSTATE_SBE), sbe) { in emit_common_so_memcpy()
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