Searched refs:brw_next_insn (Results 1 – 7 of 7) sorted by relevance
/third_party/mesa3d/src/intel/tools/ |
D | i965_gram.y | 672 brw_next_insn(p, $1); 924 brw_next_insn(p, $1); 1007 brw_next_insn(p, $2); 1035 brw_next_insn(p, $2); 1065 sendop { $$ = brw_next_insn(p, $1); } 1096 brw_next_insn(p, $2); 1115 brw_next_insn(p, $2); 1139 brw_next_insn(p, $2); 1160 brw_next_insn(p, $1); 1185 brw_next_insn(p, $1); [all …]
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_vec4_generator.cpp | 767 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_tcs_urb_write() 954 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_vec4_urb_read() 991 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_tcs_release_input() 1169 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_scratch_read() 1245 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_scratch_write() 1307 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_pull_constant_load() 1358 brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND); in generate_pull_constant_load_gfx7() 1377 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_pull_constant_load_gfx7()
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D | brw_fs_generator.cpp | 792 insn = brw_next_insn(p, BRW_OPCODE_SEND); in generate_cs_terminate() 1548 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_uniform_pull_constant_load_gfx7() 1570 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_uniform_pull_constant_load_gfx7() 1632 brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); in generate_varying_pull_constant_load_gfx4()
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D | brw_eu.h | 206 brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
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D | brw_eu_emit.c | 695 #define next_insn brw_next_insn 697 brw_next_insn(struct brw_codegen *p, unsigned opcode) in brw_next_insn() function
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D | test_eu_validate.cpp | 186 brw_next_insn(p, brw_opcode_decode(&isa, 46)); in TEST_P()
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/third_party/mesa3d/docs/relnotes/ |
D | 18.1.2.rst | 75 - intel/eu: Copy fields manually in brw_next_insn
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