Searched refs:buildBitcast (Results 1 – 4 of 4) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 712 auto Bitcast = MIRBuilder.buildBitcast({NewTy}, {ValReg}); in legalizeLoadStore()
717 MIRBuilder.buildBitcast({ValReg}, {NewLoad}); in legalizeLoadStore()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1928 B.buildBitcast(DstReg, Or); in applyMappingImpl()
1981 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2061 auto CastSrc = B.buildBitcast(Vec32, SrcReg); in applyMappingImpl()
2076 B.buildBitcast(DstReg, InsHi); in applyMappingImpl()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 539 MachineInstrBuilder buildBitcast(const DstOp &Dst, const SrcOp &Src) { in buildBitcast() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4177 Register Cast = MIRBuilder.buildBitcast(IntTy, SrcReg).getReg(0); in lowerUnmergeValues()
4302 Src = MIRBuilder.buildBitcast(SrcIntTy, Src).getReg(0); in lowerExtract()
4335 Src = MIRBuilder.buildBitcast(IntDstTy, Src).getReg(0); in lowerInsert()
4351 MIRBuilder.buildBitcast(Dst, Or); in lowerInsert()
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