Searched refs:buildBuildVector (Results 1 – 9 of 9) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 539 B.buildBuildVector(OrigRegs[0], Regs); in packSplitRegsToOrigType() 556 B.buildBuildVector(OrigRegs[0], EltMerges); in packSplitRegsToOrigType() 560 auto BV = B.buildBuildVector(BVType, Regs); in packSplitRegsToOrigType()
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D | AMDGPULegalizerInfo.cpp | 1794 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg() 2312 return B.buildBuildVector(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
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D | AMDGPURegisterBankInfo.cpp | 979 auto Merge = B.buildBuildVector(OpTy, ReadlanePieces); in executeInWaterfallLoop()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 211 MIRBuilder.buildBuildVector(DstReg, PartRegs); in insertParts() 622 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar() 748 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar() 2347 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorImplicitDef() 2440 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorBasic() 2585 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorCasts() 2652 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorCmp() 2724 MIRBuilder.buildBuildVector(DstReg, DstRegs); in fewerElementsVectorSelect() 2880 auto BuildVec = MIRBuilder.buildBuildVector(NarrowTy, SubBuildVector); in fewerElementsVectorBuildVector() 3554 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalarExtract() [all …]
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D | IRTranslator.cpp | 2163 EntryBuilder->buildBuildVector(Reg, Ops); in translate() 2173 EntryBuilder->buildBuildVector(Reg, Ops); in translate() 2190 EntryBuilder->buildBuildVector(Reg, Ops); in translate()
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D | CombinerHelper.cpp | 187 Builder.buildBuildVector(NewDstReg, Ops); in applyCombineConcatVectors()
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D | MachineIRBuilder.cpp | 611 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res, in buildBuildVector() function in MachineIRBuilder
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 812 MachineInstrBuilder buildBuildVector(const DstOp &Res,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CallLowering.cpp | 339 .buildBuildVector({NewLLT}, {CurVReg, Undef.getReg(0)}) in lowerReturn()
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