Searched refs:buildTrunc (Results 1 – 12 of 12) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUCallLowering.cpp | 102 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg() 111 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg() 561 B.buildTrunc(OrigRegs[0], BV); in packSplitRegsToOrigType()
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D | AMDGPURegisterBankInfo.cpp | 1558 B.buildTrunc(DstReg, NewDstReg); in applyMappingImpl() 1841 B.buildTrunc(DstReg, Sel); in applyMappingImpl()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86CallLowering.cpp | 275 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg() 286 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 855 MIRBuilder.buildTrunc(TmpReg, SrcReg); in narrowScalar() 1001 auto TruncMIB = MIRBuilder.buildTrunc(NarrowTy, MO1.getReg()); in narrowScalar() 1219 MIRBuilder.buildTrunc(DstReg, ResultReg); in widenScalarMergeValues() 1290 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0)); in widenScalarMergeValues() 1369 MIRBuilder.buildTrunc(DstReg, in widenScalarExtract() 1385 MIRBuilder.buildTrunc(DstReg, LShr); in widenScalarExtract() 1465 MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), NewOp); in widenScalar() 1533 MIRBuilder.buildTrunc(DstReg, ShrReg); in widenScalar() 1551 MIRBuilder.buildTrunc(DstReg, Shift); in widenScalar() 2127 MIRBuilder.buildTrunc(DstReg, {Or.getReg(0)}); in lower() [all …]
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D | CombinerHelper.cpp | 473 MachineInstr *NewMI = Builder.buildTrunc(NewDstReg, ChosenDstReg); in applyCombineExtendingLoads() 1049 Value = MIB.buildTrunc(Ty, MemSetValue).getReg(0); in optimizeMemset()
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D | CallLowering.cpp | 344 MIRBuilder.buildTrunc(ArgReg, {NewReg}).getReg(0); in handleAssignments()
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D | MachineIRBuilder.cpp | 687 MachineInstrBuilder MachineIRBuilder::buildTrunc(const DstOp &Res, in buildTrunc() function in MachineIRBuilder
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMCallLowering.cpp | 323 MIRBuilder.buildTrunc(ValVReg, LoadVReg); in assignValueToAddress() 360 MIRBuilder.buildTrunc(ValVReg, PhysRegToVReg); in assignValueToReg()
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D | ARMLegalizerInfo.cpp | 444 MIRBuilder.buildTrunc(ProcessedResult, LibcallResult); in legalizeCustom()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsCallLowering.cpp | 169 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg() 208 MIRBuilder.buildTrunc(ValVReg, LoadReg); in assignValueToAddress()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 892 MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CallLowering.cpp | 82 MIRBuilder.buildTrunc(ValVReg, Copy); in assignValueToReg()
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