| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 146 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
152 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
159 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
167 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI)) in materialize32BitImm()
169 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) in materialize32BitImm()
270 if (!constrainSelectedInstRegOperands(*Mul, TII, TRI, RBI)) in select()
294 if (!constrainSelectedInstRegOperands(*PseudoMULTu, TII, TRI, RBI)) in select()
300 if (!constrainSelectedInstRegOperands(*PseudoMove, TII, TRI, RBI)) in select()
343 if (!constrainSelectedInstRegOperands(*SLL, TII, TRI, RBI)) in select()
351 if (!constrainSelectedInstRegOperands(*ADDu, TII, TRI, RBI)) in select()
[all …]
|
| D | MipsLegalizerInfo.cpp | 377 return constrainSelectedInstRegOperands(*Trap, TII, TRI, RBI); in legalizeIntrinsic()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1130 constrainSelectedInstRegOperands(*Shl, TII, TRI, RBI); in selectVectorSHL()
1172 constrainSelectedInstRegOperands(*Neg, TII, TRI, RBI); in selectVectorASHR()
1174 constrainSelectedInstRegOperands(*SShl, TII, TRI, RBI); in selectVectorASHR()
1198 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
1206 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
1223 constrainSelectedInstRegOperands(*MovZ, TII, TRI, RBI); in materializeLargeCMVal()
1240 constrainSelectedInstRegOperands(*MovI, TII, TRI, RBI); in materializeLargeCMVal()
1326 return constrainSelectedInstRegOperands(*NewI, TII, TRI, RBI); in earlySelectSHL()
1426 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in select()
1518 return constrainSelectedInstRegOperands(*MIB.getInstr(), TII, TRI, RBI); in select()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 586 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in insertComparison()
594 if (!constrainSelectedInstRegOperands(*ReadI, TII, TRI, RBI)) in insertComparison()
605 if (!constrainSelectedInstRegOperands(*Mov1I, TII, TRI, RBI)) in insertComparison()
704 if (!constrainSelectedInstRegOperands(*MIBLoad, TII, TRI, RBI)) in selectGlobal()
711 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
718 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
733 if (!constrainSelectedInstRegOperands(*OffsetMIB, TII, TRI, RBI)) in selectGlobal()
744 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
766 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
783 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in selectSelect()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 547 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectLoadStoreOp()
584 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectFrameIndexOrGep()
630 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectGlobalValue()
677 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectConstant()
876 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
981 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectCmp()
982 constrainSelectedInstRegOperands(SetInst, TII, TRI, RBI); in selectCmp()
1048 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectFCmp()
1049 constrainSelectedInstRegOperands(Set1, TII, TRI, RBI); in selectFCmp()
1050 constrainSelectedInstRegOperands(Set2, TII, TRI, RBI); in selectFCmp()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 287 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AND_OR_XOR()
311 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
319 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_ADD_SUB()
332 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
372 if (!constrainSelectedInstRegOperands(*Addc, TII, TRI, RBI)) in selectG_ADD_SUB()
411 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_UADDO_USUBO_UADDE_USUBE()
761 constrainSelectedInstRegOperands(*ICmp, TII, TRI, RBI) && in selectG_ICMP()
777 bool Ret = constrainSelectedInstRegOperands(*ICmp, TII, TRI, RBI); in selectG_ICMP()
1022 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectStoreIntrinsic()
1104 bool Ret = constrainSelectedInstRegOperands(*DS, TII, TRI, RBI); in selectDSOrderedIntrinsic()
[all …]
|
| D | AMDGPURegisterBankInfo.cpp | 1429 if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this)) in selectStoreIntrinsic()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | Utils.h | 92 bool constrainSelectedInstRegOperands(MachineInstr &I,
|
| D | InstructionSelectorImpl.h | 995 constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI, in executeMatchTable()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 111 bool llvm::constrainSelectedInstRegOperands(MachineInstr &I, in constrainSelectedInstRegOperands() function in llvm
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 311 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in constrainAllUses()
|