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Searched refs:dmul (Results 1 – 18 of 18) sorted by relevance

/third_party/mesa3d/src/nouveau/codegen/lib/
Dgm107.asm161 dmul $r0 $r0 0x4350000000000000
268 dmul $r0 $r0 $r6
297 $p1 dmul $r0 $r0 0x4350000000000000
327 dmul $r2 $r0 $r8
329 dmul $r0 $r2 $r4
333 dmul $r0 $r2 $r4
337 dmul $r0 $r2 $r4
341 dmul $r0 $r2 $r4
346 $p1 dmul $r4 $r4 0x41a0000000000000
/third_party/mesa3d/src/compiler/glsl/
Dgl_nir_link_uniform_initializers.c121 unsigned dmul = glsl_base_type_is_64bit(base_type) ? 2 : 1; in copy_constant_to_storage() local
129 i += n_rows * dmul; in copy_constant_to_storage()
174 i += dmul; in copy_constant_to_storage()
225 unsigned dmul = glsl_base_type_is_64bit(base_type) ? 2 : 1; in set_uniform_initializer() local
234 idx += elements * dmul; in set_uniform_initializer()
Dgl_nir_lower_packed_varyings.c625 unsigned dmul = glsl_type_is_64bit(glsl_without_array(type)) ? 2 : 1; in lower_arraylike() local
626 if (array_size * dmul + fine_location % 4 > 4) { in lower_arraylike()
627 fine_location = ALIGN_POT(fine_location, dmul); in lower_arraylike()
688 unsigned dmul = glsl_type_is_64bit(type) ? 2 : 1; in lower_varying() local
726 } else if (glsl_get_vector_elements(type) * dmul + fine_location % 4 > 4) { in lower_varying()
730 unsigned aligned_fine_location = ALIGN_POT(fine_location, dmul); in lower_varying()
831 unsigned components = glsl_get_vector_elements(type) * dmul; in lower_varying()
Dlink_varyings.cpp356 unsigned dmul = type_without_array->is_64bit() ? 2 : 1; in check_location_aliasing() local
357 last_comp = component + type_without_array->vector_elements * dmul; in check_location_aliasing()
Dgl_nir_link_varyings.c321 const unsigned dmul = in xfb_decl_assign_location() local
362 1 : vector_elements * matrix_cols * dmul; in xfb_decl_assign_location()
412 unsigned array_offset = xfb_decl->array_subscript * 4 * dmul; in xfb_decl_assign_location()
429 unsigned dmul = _mesa_gl_datatype_is_64bit(xfb_decl->type) ? 2 : 1; in xfb_decl_get_num_outputs() local
430 unsigned rows_per_element = DIV_ROUND_UP(xfb_decl->vector_elements * dmul, 4); in xfb_decl_get_num_outputs()
Dgl_nir_link_uniforms.c693 unsigned dmul = glsl_type_is_64bit(glsl_without_array(type)) ? 2 : 1; in add_parameter() local
694 unsigned comps = glsl_get_vector_elements(glsl_without_array(type)) * dmul; in add_parameter()
/third_party/mesa3d/src/mesa/main/
Duniform_query.cpp352 int dmul = (uni->type->is_64bit()) ? 2 : 1; in _mesa_get_uniform() local
359 dmul = 1; in _mesa_get_uniform()
377 (offset * dword_elements * dmul); in _mesa_get_uniform()
379 src = &uni->storage[offset * elements * dmul]; in _mesa_get_uniform()
412 int sidx = i * dmul; in _mesa_get_uniform()
839 const int dmul = uni->type->is_64bit() ? 2 : 1; in _mesa_propagate_uniforms_to_driver_storage() local
844 unsigned src_vector_byte_stride = components * 4 * dmul; in _mesa_propagate_uniforms_to_driver_storage()
852 (uint8_t *) (&uni->storage[array_index * (dmul * components * vectors)].i); in _mesa_propagate_uniforms_to_driver_storage()
958 int dmul; in associate_uniform_storage() local
960 dmul = storage->type->vector_elements * sizeof(float); in associate_uniform_storage()
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/third_party/ltp/tools/sparse/sparse-src/validation/backend/
Darithmetic-ops.c56 static double dmul(double x, double y) in dmul() function
/third_party/alsa-lib/src/pcm/
Dpcm_route.c936 unsigned int sused, dused, smul, dmul; in route_load_ttable() local
941 dmul = 1; in route_load_ttable()
946 dmul = tt_ssize; in route_load_ttable()
961 v = ttable[src_channel * smul + dst_channel * dmul]; in route_load_ttable()
/third_party/mesa3d/src/compiler/nir/
Dnir_linking_helpers.c335 unsigned dmul = glsl_type_is_64bit(glsl_without_array(type)) ? 2 : 1; in get_unmoveable_components_masks() local
343 comps_slot2 = (elements * dmul) - num_comps; in get_unmoveable_components_masks()
355 ((1 << (elements * dmul)) - 1) << var->data.location_frac; in get_unmoveable_components_masks()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td74 class DMUL_R6_DESC : MUL_R6_DESC_BASE<"dmul", GPR64Opnd, II_DMUL, mul>;
DMips64InstrInfo.td524 def DMUL : ArithLogicR<"dmul", GPR64Opnd, 1, II_DMUL, mul>,
1115 "dmul\t$rs, $rt, $imm">,
1128 "dmul\t$rs, $rt, $rd"> {
/third_party/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_nir_soa.c362 int dmul = bit_size == 64 ? 2 : 1; in emit_load_var() local
376 int idx = (i * dmul) + location_frac; in emit_load_var()
516 int idx = (i * dmul) + location_frac; in emit_load_var()
/third_party/node/deps/v8/src/codegen/ppc/
Dconstants-ppc.h1399 V(dmul, DMUL, 0xEC000044) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4990 "mtc1\005dmtc2\006dmtgc0\004dmuh\005dmuhu\004dmul\005dmulo\006dmulou\005"
6399 …{ 3403 /* dmul */, Mips::DMUL, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__GPR64AsmReg1_1, AMFBS_HasC…
6400 …{ 3403 /* dmul */, Mips::DMULMacro, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, AMFBS…
6401 …{ 3403 /* dmul */, Mips::DMUL_R6, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, AMFBS_H…
6402 …{ 3403 /* dmul */, Mips::DMUL, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, AMFBS_HasC…
6403 …{ 3403 /* dmul */, Mips::DMULImmMacro, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__SImm32_Relaxed1_2,…
9606 { 3403 /* dmul */, 3 /* 0, 1 */, MCK_GPR64AsmReg, AMFBS_HasCnMips },
9607 { 3403 /* dmul */, 7 /* 0, 1, 2 */, MCK_GPR64AsmReg, AMFBS_HasMips3_NotMips64r6_NotCnMips },
9608 { 3403 /* dmul */, 7 /* 0, 1, 2 */, MCK_GPR64AsmReg, AMFBS_HasStdEnc_HasMips64r6_NotInMicroMips },
9609 { 3403 /* dmul */, 7 /* 0, 1, 2 */, MCK_GPR64AsmReg, AMFBS_HasCnMips },
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/third_party/node/deps/v8/src/codegen/mips64/
Dmacro-assembler-mips64.cc488 dmul(rd, rs, rt.rm()); in CallRecordWriteStub()
500 dmul(rd, rs, scratch); in CallRecordWriteStub()
Dassembler-mips64.h521 void dmul(Register rd, Register rs, Register rt);
Dassembler-mips64.cc1754 void Assembler::dmul(Register rd, Register rs, Register rt) { in dmul() function in v8::internal::Assembler