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Searched refs:fneg (Results 1 – 25 of 99) sorted by relevance

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/third_party/mesa3d/src/amd/compiler/tests/
Dtest_optimizer.cpp36 Temp neg_b = fneg(inputs[1]);
43 Temp neg_a = fneg(inputs[0]);
48 Temp neg_neg_a = fneg(neg_a);
59 Temp neg_abs_a = fneg(abs_a);
76 Temp neg_c = fneg(bld.copy(bld.def(v1), inputs[2]));
723 Temp xor0 = fneg(inputs[0]);
725 Temp xor1 = fneg(min);
731 xor1 = fneg(min);
939 val = fneg(val);
945 val = fneg(fabs(val));
[all …]
Dtest_sdwa.cpp289 Temp neg_byte0 = fneg(byte0);
297 Temp neg = fneg(inputs[1]);
317 Temp neg_abs_byte0 = fneg(abs_byte0);
325 Temp neg_abs = fneg(abs);
Dhelpers.h94 aco::Temp fneg(aco::Temp src, aco::Builder b=bld);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td467 [(set DPR:$Dd, (fneg (fmul DPR:$Dn, (f64 DPR:$Dm))))]>,
473 [(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]>,
483 [(set HPR:$Sd, (fneg (fmul HPR:$Sn, HPR:$Sm)))]>,
542 def : Pat<(fmul (fneg DPR:$a), (f64 DPR:$b)),
545 def : Pat<(fmul (fneg SPR:$a), SPR:$b),
925 [(set DPR:$Dd, (fneg (f64 DPR:$Dm)))]>;
930 [(set SPR:$Sd, (fneg SPR:$Sm))]> {
939 [(set HPR:$Sd, (fneg HPR:$Sm))]>;
1206 // Hoist an fabs or a fneg of a value coming from integer registers
1207 // and do the fabs/fneg on the integer value. This is never a lose
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td209 def : InstAlias<"fneg.d $rd, $rs", (FSGNJN_D FPR64:$rd, FPR64:$rs, FPR64:$rs)>;
252 def : Pat<(fneg FPR64:$rs1), (FSGNJN_D $rs1, $rs1)>;
256 def : Pat<(fcopysign FPR64:$rs1, (fneg FPR64:$rs2)), (FSGNJN_D $rs1, $rs2)>;
266 def : Pat<(fma FPR64:$rs1, FPR64:$rs2, (fneg FPR64:$rs3)),
270 def : Pat<(fma (fneg FPR64:$rs1), FPR64:$rs2, FPR64:$rs3),
274 def : Pat<(fma (fneg FPR64:$rs1), FPR64:$rs2, (fneg FPR64:$rs3)),
DRISCVInstrInfoF.td238 def : InstAlias<"fneg.s $rd, $rs", (FSGNJN_S FPR32:$rd, FPR32:$rs, FPR32:$rs)>;
312 def : Pat<(fneg FPR32:$rs1), (FSGNJN_S $rs1, $rs1)>;
316 def : Pat<(fcopysign FPR32:$rs1, (fneg FPR32:$rs2)), (FSGNJN_S $rs1, $rs2)>;
323 def : Pat<(fma FPR32:$rs1, FPR32:$rs2, (fneg FPR32:$rs3)),
327 def : Pat<(fma (fneg FPR32:$rs1), FPR32:$rs2, FPR32:$rs3),
331 def : Pat<(fma (fneg FPR32:$rs1), FPR32:$rs2, (fneg FPR32:$rs3)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DREADME_P9.txt181 (set f128:$vT, (fneg (fabs f128:$vB))) // xsnabsqp
182 (set f128:$vT, (fneg f128:$vB)) // xsnegqp
231 [(set f128:$vT, (fma f128:$vA, f128:$vB, (fneg f128:$vTi)))]>,
236 [(set f128:$vT, (fneg (fma f128:$vA, f128:$vB, f128:$vTi)))]>,
241 [(set f128:$vT, (fneg (fma f128:$vA, f128:$vB, (fneg f128:$vTi))))]>,
283 [(set f128:$vT, (PPCfmarto f128:$vA, f128:$vB, (fneg f128:$vTi)))]>,
288 [(set f128:$vT, (fneg (PPCfmarto f128:$vA, f128:$vB, f128:$vTi)))]>,
293 [(set f128:$vT, (fneg (PPCfmarto f128:$vA, f128:$vB, (fneg f128:$vTi))))]>,
DPPCInstrQPX.td182 [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
189 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
195 (fneg v4f64:$FRB)))]>;
202 (fneg v4f32:$FRB)))]>;
206 [(set v4f64:$FRT, (fneg (fma v4f64:$FRA, v4f64:$FRC,
207 (fneg v4f64:$FRB))))]>;
213 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
214 (fneg v4f32:$FRB))))]>;
351 [(set v4f64:$FRT, (fneg v4f64:$FRB))]>;
356 [(set v4f32:$FRT, (fneg v4f32:$FRB))]>;
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DPPCInstrVSX.td286 [(set f64:$XT, (fma f64:$XA, f64:$XB, (fneg f64:$XTi)))]>,
302 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, f64:$XTi)))]>,
318 [(set f64:$XT, (fneg (fma f64:$XA, f64:$XB, (fneg f64:$XTi))))]>,
366 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>,
382 [(set v4f32:$XT, (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi)))]>,
398 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>,
414 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, v4f32:$XTi)))]>,
430 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi))))]>,
446 [(set v4f32:$XT, (fneg (fma v4f32:$XA, v4f32:$XB, (fneg v4f32:$XTi))))]>,
568 [(set f64:$XT, (fneg (fabs f64:$XB)))]>;
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/third_party/ffmpeg/libavcodec/aarch64/
Dmdct_neon.S155 fneg v4.4s, v0.4s
231 fneg v7.2s, v7.2s // R*s-I*c
258 fneg v7.2s, v7.2s // R*s-I*c
309 fneg v4.2s, v4.2s
310 fneg v6.2s, v6.2s
Daacpsdsp_neon.S72 fneg v2.4S, v1.4S
73 fneg v3.4S, v7.4S
Dfft_neon.S191 fneg v22.4s, v20.4s
216 fneg v26.4s, v24.4s
281 fneg v22.4s, v20.4s
319 fneg v22.4s, v20.4s
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstructions.td702 (f64 (fneg (f64 (ffloor (f64 (VOP3Mods f64:$x, i32:$mods)))))))),
1090 // Prevent expanding both fneg and fabs.
1095 (fneg (fabs (f32 SReg_32:$src))),
1105 (fneg (f32 SReg_32:$src)),
1110 (fneg (f16 SReg_32:$src)),
1115 (fneg (f16 VGPR_32:$src)),
1125 (fneg (fabs (f16 SReg_32:$src))),
1130 (fneg (fabs (f16 VGPR_32:$src))),
1135 (fneg (v2f16 SReg_32:$src)),
1144 // This is really (fneg (fabs v2f16:$src))
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/third_party/ltp/tools/sparse/sparse-src/validation/
Dfp-ops.c5 double fneg(double x) { return -x; } in fneg() function
/third_party/vixl/test/aarch64/
Dtest-disasm-fp-aarch64.cc76 COMPARE(fneg(s4, s5), "fneg s4, s5"); in TEST()
77 COMPARE(fneg(s31, s30), "fneg s31, s30"); in TEST()
78 COMPARE(fneg(d6, d7), "fneg d6, d7"); in TEST()
79 COMPARE(fneg(d31, d30), "fneg d31, d30"); in TEST()
/third_party/ltp/tools/sparse/sparse-src/validation/backend/
Darithmetic-ops.c101 static float fneg(float x) in fneg() function
/third_party/mesa3d/docs/relnotes/
D21.3.3.rst54 - aco/optimizer: fix fneg modifier propagation on VOP3P
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMipsInstrFPU.td134 def FNEG_S_MM : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, II_NEG, fneg>,
161 defm FNEG : ABSS_MMM<"neg.d", II_NEG, fneg>, ABS_FM_MM<1, 0x2d>;
388 // To generate NMADD and NMSUB instructions when fneg node is present
DMipsInstrFPU.td501 def FNEG_S : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, II_NEG, fneg>,
504 defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>, ISA_MIPS1;
951 // To generate NMADD and NMSUB instructions when fneg node is present
953 def : MipsPat<(fneg (fadd (fmul RC:$fs, RC:$ft), RC:$fr)),
955 def : MipsPat<(fneg (fsub (fmul RC:$fs, RC:$ft), RC:$fr)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZOperators.td712 (any_fma node:$src1, node:$src2, (fneg node:$src3))>;
719 (any_fma node:$src2, node:$src3, (fneg node:$src1))>;
723 (fneg (any_fma node:$src1, node:$src2, node:$src3))>;
725 (fneg (any_fms node:$src1, node:$src2, node:$src3))>;
728 def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>;
DSystemZInstrFP.td338 def LCXBR : UnaryRRE<"lcxbr", 0xB343, fneg, FP128, FP128>;
341 def LCDFR : UnaryRRE<"lcdfr", 0xB373, fneg, FP64, FP64>;
343 def LCDFR_32 : UnaryRRE<"lcdfr", 0xB373, fneg, FP32, FP32>;
/third_party/mesa3d/src/amd/compiler/
Daco_optimizer.cpp3479 VOP3P_instruction* fneg = &info.instr->vop3p(); in combine_vop3p() local
3481 if ((fneg->opsel_lo | fneg->opsel_hi) & 2) in combine_vop3p()
3491 if (fneg->clamp) in combine_vop3p()
3493 instr->operands[i] = fneg->operands[0]; in combine_vop3p()
3501 bool neg_lo = fneg->neg_lo[0] ^ fneg->neg_lo[1]; in combine_vop3p()
3502 bool neg_hi = fneg->neg_hi[0] ^ fneg->neg_hi[1]; in combine_vop3p()
3505 vop3p->opsel_lo ^= ((opsel_lo ? ~fneg->opsel_hi : fneg->opsel_lo) & 1) << i; in combine_vop3p()
3506 vop3p->opsel_hi ^= ((opsel_hi ? ~fneg->opsel_hi : fneg->opsel_lo) & 1) << i; in combine_vop3p()
3508 if (--ctx.uses[fneg->definitions[0].tempId()]) in combine_vop3p()
3509 ctx.uses[fneg->operands[0].tempId()]++; in combine_vop3p()
/third_party/elfutils/tests/
Dtestfile-riscv64-dis1.expect.bz21testfile-riscv64-dis1.o: elf64-elf_riscv 2 3Disassembly of section .text ...
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td3421 defm FNEG : SingleOperandFPData<0b0010, "fneg", fneg>;
3499 TriOpFrag<(fma node:$LHS, (fneg node:$MHS), node:$RHS)> >;
3501 TriOpFrag<(fneg (fma node:$LHS, node:$MHS, node:$RHS))> >;
3503 TriOpFrag<(fma node:$LHS, node:$MHS, (fneg node:$RHS))> >;
3514 def : Pat<(f16 (fma (fneg FPR16:$Rn), FPR16:$Rm, FPR16:$Ra)),
3517 def : Pat<(f32 (fma (fneg FPR32:$Rn), FPR32:$Rm, FPR32:$Ra)),
3520 def : Pat<(f64 (fma (fneg FPR64:$Rn), FPR64:$Rm, FPR64:$Ra)),
3526 def : Pat<(f16 (fma (fneg FPR16:$Rn), FPR16:$Rm, (fneg FPR16:$Ra))),
3529 def : Pat<(f32 (fma (fneg FPR32:$Rn), FPR32:$Rm, (fneg FPR32:$Ra))),
3532 def : Pat<(f64 (fma (fneg FPR64:$Rn), FPR64:$Rm, (fneg FPR64:$Ra))),
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/third_party/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir_emit.c65 OP(mov, MOV, X_X_0), OP(fneg, MOV, X_X_0), OP(fabs, MOV, X_X_0), OP(fsat, MOV, X_X_0),

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